Shakti-T: A RISC-V Processor with Light Weight Security Extensions
Citations
55 citations
Cites background from "Shakti-T: A RISC-V Processor with L..."
...Some prior arts extended RISC-V to domainspecific accelerators/coprocessors [22], [27]–[29]....
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29 citations
Cites background from "Shakti-T: A RISC-V Processor with L..."
...Shakti-T [8] employs the concept of base and bounds to ensure that pointers access only valid memory regions....
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14 citations
Cites background or methods from "Shakti-T: A RISC-V Processor with L..."
...Although [23] enhances a RISC-V processor to efficiently implement memory checks, the software support required for [23] is extremely complex....
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...On the other hand, hardware solutions like [23, 25] reduce the run time overhead at the cost of hardware complexity....
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...Safety Check Instrumentation Methods Metadata Size Performance Overheads Spatial Temporal Hardware Compiler Hardware Software [33] ✔ × × ✔ 128*n NA NA [27] ✔ ✔ × ✔ 256*n + 64 NA 29% [25] ✔ ✔ ✔ ✔ 256*n + 64 NA 25% [23] ✔ ✔ ✔ × 64*n + 128 0% NA [7] ✔ × ✔ × 128*n NA 10% Shakti-MS ✔ ✔ ✔ ✔ 128*n 0% 13%...
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...Further, unlike [25], we are not using any separate shadow memory space and unlike [23], there are no additional tables or tag bits that are required in the processor to store pointer metadata....
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12 citations
Cites background or methods from "Shakti-T: A RISC-V Processor with L..."
...On the other hand, ISA extensions such as Shakti-T [9] and Watchdog Lite [10] aim at mitigating pointer hijacking....
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...First, those that use specific toolchains, compilers [9], [10] or library to adapt an applica-...
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...To identify pointers, Shakti-T, and Watchdog Lite need to instrument the code in advance using compiler modification....
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9 citations
References
1,536 citations
Additional excerpts
...Some of the proposed solutions include: stack canaries [8]; encryption of the code pointer [9]; storing the return address in a shadow stack [11, 33, 12]; re-arranging argument locations, return addresses, previous frame pointers and local variables [34]; control flow integrity checks [1]; and, Address Space Layout Randomization (ASLR) [31]....
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1,367 citations
"Shakti-T: A RISC-V Processor with L..." refers background in this paper
...As the manifestations of buffer-overflow evolved over time, such as return-to-libc [30] and Return Oriented Programming (ROP) [29], several software defined solutions came into existence....
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1,070 citations
"Shakti-T: A RISC-V Processor with L..." refers methods in this paper
...Researchers have also found several ways to exploit this vulnerability, such as the blaster worm [5] and the slammer worm [21] which have been used to perform Distributed Denial of Service attacks within a network....
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992 citations
Additional excerpts
...Some of the proposed solutions include: stack canaries [8]; encryption of the code pointer [9]; storing the return address in a shadow stack [11, 33, 12]; re-arranging argument locations, return addresses, previous frame pointers and local variables [34]; control flow integrity checks [1]; and, Address Space Layout Randomization (ASLR) [31]....
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951 citations
"Shakti-T: A RISC-V Processor with L..." refers background in this paper
...3092629 One of the most popular form of spatial memory attacks is buffer-overflow [28]....
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