Shakti-T: A RISC-V Processor with Light Weight Security Extensions
Citations
55 citations
Cites background from "Shakti-T: A RISC-V Processor with L..."
...Some prior arts extended RISC-V to domainspecific accelerators/coprocessors [22], [27]–[29]....
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29 citations
Cites background from "Shakti-T: A RISC-V Processor with L..."
...Shakti-T [8] employs the concept of base and bounds to ensure that pointers access only valid memory regions....
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14 citations
Cites background or methods from "Shakti-T: A RISC-V Processor with L..."
...Although [23] enhances a RISC-V processor to efficiently implement memory checks, the software support required for [23] is extremely complex....
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...On the other hand, hardware solutions like [23, 25] reduce the run time overhead at the cost of hardware complexity....
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...Safety Check Instrumentation Methods Metadata Size Performance Overheads Spatial Temporal Hardware Compiler Hardware Software [33] ✔ × × ✔ 128*n NA NA [27] ✔ ✔ × ✔ 256*n + 64 NA 29% [25] ✔ ✔ ✔ ✔ 256*n + 64 NA 25% [23] ✔ ✔ ✔ × 64*n + 128 0% NA [7] ✔ × ✔ × 128*n NA 10% Shakti-MS ✔ ✔ ✔ ✔ 128*n 0% 13%...
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...Further, unlike [25], we are not using any separate shadow memory space and unlike [23], there are no additional tables or tag bits that are required in the processor to store pointer metadata....
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12 citations
Cites background or methods from "Shakti-T: A RISC-V Processor with L..."
...On the other hand, ISA extensions such as Shakti-T [9] and Watchdog Lite [10] aim at mitigating pointer hijacking....
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...First, those that use specific toolchains, compilers [9], [10] or library to adapt an applica-...
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...To identify pointers, Shakti-T, and Watchdog Lite need to instrument the code in advance using compiler modification....
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9 citations
References
949 citations
Additional excerpts
...Though literature shows that ASLR has proven to be the most effective and widely adopted technique for protection against ROP based attacks, there do exist well known attacks that either leak sensitive information [32] or change the control flow [18] by bypassing ASLR....
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...Some of the proposed solutions include: stack canaries [8]; encryption of the code pointer [9]; storing the return address in a shadow stack [11, 33, 12]; re-arranging argument locations, return addresses, previous frame pointers and local variables [34]; control flow integrity checks [1]; and, Address Space Layout Randomization (ASLR) [31]....
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777 citations
"Shakti-T: A RISC-V Processor with L..." refers background in this paper
...There exists numerous software solutions [3, 19, 25, 39, 2] which implement fat-pointers for security....
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647 citations
"Shakti-T: A RISC-V Processor with L..." refers methods in this paper
...This solution has also been extended to prevent read-buffer-overflow based attacks such as Heartbleed [15] and format-string-attacks [26]....
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583 citations
566 citations
"Shakti-T: A RISC-V Processor with L..." refers background in this paper
...Some prominent forms of temporal attacks include use-after-free [38, 7] and doublefree[18] attacks which exploit dangling pointers to corrupt memory regions which have been freed by an aliased pointer....
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...) p=q; a[7]= *(p+3); char *ptr1= (char *) malloc (10* sizeof (char)) char **ptr2= &ptr1; ....
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