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Journal ArticleDOI

Si, SiGe Nanowire Devices by Top–Down Technology and Their Applications

TL;DR: The current technology status for realizing the GAA NW device structures and their applications in logic circuit and nonvolatile memories are reviewed and the challenges and opportunities are outlined.
Abstract: Nanowire (NW) devices, particularly the gate-all-around (GAA) CMOS architecture, have emerged as the front-runner for pushing CMOS scaling beyond the roadmap. These devices offer unique advantages over their planar counterparts which make them feasible as an option for 22 -nm and beyond technology nodes. This paper reviews the current technology status for realizing the GAA NW device structures and their applications in logic circuit and nonvolatile memories. We also take a glimpse into applications of NWs in the ldquomore-than-Moorerdquo regime and briefly discuss the application of NWs as biochemical sensors. Finally, we summarize the status and outline the challenges and opportunities of the NW technology.
Citations
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Journal ArticleDOI
TL;DR: In this article, the authors summarized some of the essential aspects of silicon-nanowire growth and of their electrical properties, including the expansion of the base of epitaxially grown Si wires, a stability criterion regarding the surface tension of the catalyst droplet, and the consequences of the Gibbs-Thomson effect for the silicon wire growth velocity.
Abstract: This paper summarizes some of the essential aspects of silicon-nanowire growth and of their electrical properties. In the first part, a brief description of the different growth techniques is given, though the general focus of this work is on chemical vapor deposition of silicon nanowires. The advantages and disadvantages of the different catalyst materials for silicon-wire growth are discussed at length. Thereafter, in the second part, three thermodynamic aspects of silicon-wire growth via the vapor–liquid–solid mechanism are presented and discussed. These are the expansion of the base of epitaxially grown Si wires, a stability criterion regarding the surface tension of the catalyst droplet, and the consequences of the Gibbs–Thomson effect for the silicon wire growth velocity. The third part is dedicated to the electrical properties of silicon nanowires. First, different silicon nanowire doping techniques are discussed. Attention is then focused on the diameter dependence of dopant ionization and the influence of interface trap states on the charge carrier density in silicon nanowires. It is concluded by a section on charge carrier mobility and mobility measurements.

721 citations

Journal ArticleDOI
TL;DR: In this article, a Si nanowire based tunneling field effect transistor (TFET) using a CMOS-compatible vertical gate-all-around structure has been presented.
Abstract: This letter presents a Si nanowire based tunneling field-effect transistor (TFET) using a CMOS-compatible vertical gate-all-around structure. By minimizing the thermal budget with low-temperature dopant-segregated silicidation for the source-side dopant activation, excellent TFET characteristics were obtained. We have demonstrated for the first time the lowest ever reported subthreshold swing (SS) of 30 mV/decade at room temperature. In addition, we reported a very convincing SS of 50 mV/decade for close to three decades of drain current. Moreover, our TFET device exhibits excellent characteristics without ambipolar behavior and with high Ion/Ioff ratio (105), as well as low Drain-Induced Barrier Lowering of 70 mV/V.

297 citations


Cites background from "Si, SiGe Nanowire Devices by Top–Do..."

  • ...(∼70 mV/V) is achieved as a result of excellent gate control by GAA structure [4], [11], and [12]....

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Journal ArticleDOI
19 Feb 2013-ACS Nano
TL;DR: A bit- cost-effective technology path toward the 3D integration that requires only one critical lithography step or mask for reducing the bit-cost is demonstrated in this work.
Abstract: The three-dimensional (3D) cross-point array architecture is attractive for future ultra-high-density nonvolatile memory application. A bit-cost-effective technology path toward the 3D integration that requires only one critical lithography step or mask for reducing the bit-cost is demonstrated in this work. A double-layer HfOx-based vertical resistive switching random access memory (RRAM) is fabricated and characterized. The HfOx thin film is deposited at the sidewall of the predefined trench by atomic layer deposition, forming a vertical memory structure. Electrode/oxide interface engineering with a TiON interfacial layer results in nonlinear I–V suitable for the selectorless array. The fabricated HfOx vertical RRAM shows excellent performances such as reset current ( 108 cycles), read disturbance immunity (>109 cycles), and data retention time (>105 s @ 125 °C).

294 citations

Proceedings ArticleDOI
01 Dec 2012
TL;DR: In this paper, a double-layer stacked HfOx vertical RRAM is demonstrated for 3D crosspoint architecture using a cost-effective fabrication process, and a unique write/read scheme is proposed for 3d cross-point architecture.
Abstract: Double-layer stacked HfOx vertical RRAM is demonstrated for 3D cross-point architecture using a cost-effective fabrication process. Electrode/oxide interface engineering using TiON layer results in non-linear I-V suitable for the selector-less array. The fabricated HfOx vertical RRAM shows excellent performances such as reset current ( 108 cycles), half-selected read disturbance immunity (>109 cycles), retention (>105s @125oC). Moreover, a unique write/read scheme is proposed for 3D cross-point architecture. Analysis shows that for such 3D selector-less array, a large R on (∼100kΩ) from the non-linear I-V helps reduce the sneak path current, and a low interconnect resistance using metal planes as word lines reduces the undesirable voltage drop on the interconnect. As a conservative estimate, simulation shows that Mb-scale array without cell selector is achievable.

175 citations

Journal ArticleDOI
TL;DR: This review provides methods for the synthesis and modification of silicon nanosheets and other silicon nanomaterials with examples of their potential applications and a soft synthetic method for silicon nanOSheets with chemical surface modification in a solution process.
Abstract: Silicon nanomaterials and nanostructures exhibit different properties from those of bulk silicon materials based on quantum confinement effects. They are expected to lead to the development of new applications of silicon, in addition to wide use in semiconductor devices. Aside from industrial interest, intriguing issues of academic interest still remain with respect to the origins of their characteristic properties. Zero- and one-dimensional crystalline silicon nanomaterials have been synthesized, to date, by using many methods and there has been rapid progress in size control and modification procedures. However, there have been only a few examples of silicon nanomaterials with atomic-order thickness akin to carbon nanomaterials, such as two-dimensional silicon nanosheets. Moreover, mass production of silicon nanomaterials with relatively low cost is not easily achievable, due to the typically severe conditions required for fabrication, such as high temperature and ultralow pressure. Recently, we have developed a soft synthetic method for silicon nanosheets with chemical surface modification in a solution process. This review provides methods for the synthesis and modification of silicon nanosheets and other silicon nanomaterials with examples of their potential applications.

160 citations

References
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Journal ArticleDOI
TL;DR: Direct, real-time electrical detection of single virus particles with high selectivity by using nanowire field effect transistors is reported, suggesting potential for simultaneous detection of a large number of distinct viral threats at the single virus level.
Abstract: We report direct, real-time electrical detection of single virus particles with high selectivity by using nanowire field effect transistors. Measurements made with nanowire arrays modified with antibodies for influenza A showed discrete conductance changes characteristic of binding and unbinding in the presence of influenza A but not paramyxovirus or adenovirus. Simultaneous electrical and optical measurements using fluorescently labeled influenza A were used to demonstrate conclusively that the conductance changes correspond to binding/unbinding of single viruses at the surface of nanowire devices. pH-dependent studies further show that the detection mechanism is caused by a field effect, and that the nanowire devices can be used to determine rapidly isoelectric points and variations in receptor-virus binding kinetics for different conditions. Lastly, studies of nanowire devices modified with antibodies specific for either influenza or adenovirus show that multiple viruses can be selectively detected in parallel. The possibility of large-scale integration of these nanowire devices suggests potential for simultaneous detection of a large number of distinct viral threats at the single virus level.

1,257 citations


"Si, SiGe Nanowire Devices by Top–Do..." refers background in this paper

  • ...Electrical sensing through change in conductance (or resistance) of Si-NW has been demonstrated successfully for metal ions [9], [10], [62], DNA [63]–[68], proteins [69]–[71], virus [72], and cells [73]....

    [...]

Proceedings ArticleDOI
01 Dec 2007
TL;DR: In this paper, a 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process, resulting in the highest drive currents yet reported for NMOS and PMOS.
Abstract: A 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process. The transistors feature 1.0 nm EOT high-k gate dielectric, dual band edge workfunction metal gates and third generation strained silicon, resulting in the highest drive currents yet reported for NMOS and PMOS. The technology also features trench contact based local routing, 9 layers of copper interconnect with low-k ILD, low cost 193 nm dry patterning, and 100% Pb-free packaging. Process yield, performance and reliability are demonstrated on 153 Mb SRAM arrays with SRAM cell size of 0.346 mum2, and on multiple microprocessors.

973 citations

Journal ArticleDOI
04 Apr 2003-Science
TL;DR: A general method for producing ultrahigh-density arrays of aligned metal and semiconductor nanowires and nanowire circuits based on translating thin film growth thickness control into planar wire arrays is described.
Abstract: We describe a general method for producing ultrahigh-density arrays of aligned metal and semiconductor nanowires and nanowire circuits. The technique is based on translating thin film growth thickness control into planar wire arrays. Nanowires were fabricated with diameters and pitches (center-to-center distances) as small as 8 nanometers and 16 nanometers, respectively. The nanowires have high aspect ratios (up to 106), and the process can be carried out multiple times to produce simple circuits of crossed nanowires with a nanowire junction density in excess of 1011 per square centimeter. The nanowires can also be used in nanomechanical devices; a high-frequency nanomechanical resonator is demonstrated.

950 citations


"Si, SiGe Nanowire Devices by Top–Do..." refers methods in this paper

  • ...…have been investigated for assembly [12]–[14], including the templated growth [15] of NWs. Fabrication of silicon NWs (Si-NWs) and devices has also been reported using etching, with the platinum NW masks being prepared with the help of the superlattice NW pattern transfer (SNAP) process [16], [17]....

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Journal ArticleDOI
25 Aug 2006-Science
TL;DR: Electrical properties of hybrid structures consisting of arrays of nanowire field-effect transistors integrated with the individual axons and dendrites of live mammalian neurons, where each nanoscale junction can be used for spatially resolved, highly sensitive detection, stimulation, and/or inhibition of neuronal signal propagation are reported.
Abstract: We report electrical properties of hybrid structures consisting of arrays of nanowire field-effect transistors integrated with the individual axons and dendrites of live mammalian neurons, where each nanoscale junction can be used for spatially resolved, highly sensitive detection, stimulation, and/or inhibition of neuronal signal propagation. Arrays of nanowire-neuron junctions enable simultaneous measurement of the rate, amplitude, and shape of signals propagating along individual axons and dendrites. The configuration of nanowire-axon junctions in arrays, as both inputs and outputs, makes possible controlled studies of partial to complete inhibition of signal propagation by both local electrical and chemical stimuli. In addition, nanowire-axon junction arrays were integrated and tested at a level of at least 50 "artificial synapses" per neuron.

861 citations


"Si, SiGe Nanowire Devices by Top–Do..." refers background in this paper

  • ...Electrical sensing through change in conductance (or resistance) of Si-NW has been demonstrated successfully for metal ions [9], [10], [62], DNA [63]–[68], proteins [69]–[71], virus [72], and cells [73]....

    [...]

Journal ArticleDOI
Zhiyong Li1, Yong Chen1, Xuema Li1, Theodore I. Kamins1, K. Nauka1, R.S. Williams1 
TL;DR: Highly sensitive and sequence-specific DNA sensors were fabricated based on silicon nanowires with single stranded probe DNA molecules covalently immobilized on the nanowire surfaces, recognizing label-free complementary ss-DNA in sample solutions when the target DNA was hybridized with the probe DNA attached on the SiNW surfaces.
Abstract: Highly sensitive and sequence-specific DNA sensors were fabricated based on silicon nanowires (SiNWs) with single stranded (ss) probe DNA molecules covalently immobilized on the nanowire surfaces. Label-free complementary (target) ss-DNA in sample solutions were recognized when the target DNA was hybridized with the probe DNA attached on the SiNW surfaces, producing a change of the conductance of the SiNWs. For a 12-mer oligonucletide probe, 25 pM of target DNA in solution was detected easily (signal/noise ratio > 6), whereas 12-mers with one base mismatch did not produce a signal above the background noise.

805 citations


"Si, SiGe Nanowire Devices by Top–Do..." refers background in this paper

  • ...18 shows the fractional change in the conductivity for DNA sensing as a function of its molar concentration after surface functionalization and subsequent binding of the target molecules....

    [...]

  • ...Electrical sensing through change in conductance (or resistance) of Si-NW has been demonstrated successfully for metal ions [9], [10], [62], DNA [63]–[68], proteins [69]–[71], virus [72], and cells [73]....

    [...]