Silicon Micromachining: Bulk

A silicon wafer bonding process is described in which only thermally grown oxide is present between wafer pairs. Bonding occurs after insertion into an oxidizing ambient. It is proposed the wafers are drawn into intimate contact as a result of the gaseous oxygen between them being consumed by oxidation, thus producing a partial vacuum. The proposed bonding mechanism is polymerization of silanol bonds between wafer pairs. Silicon on insulator (SOI) is produced by etching away all but a few microns of one of the bonded pair. Capacitor measurements show a 27 μs minority‐carrier lifetime and no degradation of the SOI‐insulator interface. In addition, there is negligible charge at the bonding interface making the technique attractive for three‐dimensional as well as planar SOI applications.

Wafer bonding for silicon‐on‐insulator technologies

Ethylene Diamine‐Pyrocatechol‐Water Mixture Shows Etching Anomaly in Boron‐Doped Silicon

A microfabricated floating-element (120 mu m*140 mu m*5 mu m) liquid shear stress sensor has been developed using wafer-bonding technology. The sensor has been designed for high shear stresses (1-100 kPa) and high-pressure environments (up to 6600 psi) and utilizes a piezoresistive transduction scheme. Analytical and finite-element method (FEM) modeling have been performed to predict the sensor response. The sensor has been tested for both its mechanical integrity in high-pressure environments and its output response in the controlled environment of a cone and plate viscometer. The processing steps in the fabrication of the sensor, the analytical and FEM modeling, the experimental procedures, and the results of the experiments are described. >

A microfabricated floating-element shear stress sensor using wafer-bonding technology

A reactive ion etching (RIE) process is used for the fabrication of submicron, movable single-crystal silicon (SCS) mechanical structures and capacitor actuators. The process is called SCREAM for single crystal reactive etching and metallization process. The RIE process gives excellent control of lateral dimensions (0.2 mu m approximately 2 mu m) while maintaining a large vertical depth (1 mu m approximately 4 mu m) for the formation of high aspect ratio, freely suspended SCS structures. The silicon etch processes are independent of crystal orientation and produce controllable vertical profiles. The process also incorporates process steps to form vertical, 4 mu m deep, aluminum, capacitor actuators. Using SCREAM, the authors have designed, fabricated and tested two-dimensional x-y microstages and circular SCS structures. For the x-y stage they measured a maximum displacement of +or-6 mu m in x and y with 40 V DC applied to either x or y, or both x and y actuators. The process technology offers the capability to use a structural stiffness as low as 10-2 N m-1.

https://iopscience.iop.org/article/10.1088/0960-1317/2/1/007/pdf

A RIE process for submicron, silicon electromechanical structures

The etch‐stop phenomenon which occurs in both p‐ and n‐Si when the doping density exceeds 1019 cm−3 has been studied in situ with ellipsometry. Biasing the samples both anodically and cathodically from open‐circuit potential causes layers to grow which can then be observed to etch back when the applied potential is released. We are lead to the conclusion that p‐Si etch stops because of spontaneous passivation which produces a thin oxide‐like layer, while n‐Si shows a tendency to etch stop, probably owing to formation of a prepassive layer.

Silicon Micromachining: Bulk

References

Wafer bonding for silicon‐on‐insulator technologies

Ethylene Diamine‐Pyrocatechol‐Water Mixture Shows Etching Anomaly in Boron‐Doped Silicon

A microfabricated floating-element shear stress sensor using wafer-bonding technology

A RIE process for submicron, silicon electromechanical structures

Ellipsometric Study of the Etch‐Stop Mechanism in Heavily Doped Silicon

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