Patent•
Simplified micro-bridging and roughness analysis
26 Mar 2010-
TL;DR: In this paper, the authors provide apparatus and methods for processing substrates using pooled statistically based variance data, which can include Pooled Polymer De-protection Variance (PPDV) data that can be used to determine microbridging defect data, LER defect data and LWR defect data.
Abstract: The invention provides apparatus and methods for processing substrates using pooled statistically based variance data. The statistically based variance data can include Pooled Polymer De-protection Variance (PPDV) data that can be used to determine micro-bridging defect data, LER defect data, and LWR defect data.
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Patent•
11 Aug 2014TL;DR: In this article, a plurality of optical signals is acquired from one or more targets located in the plurality of fields on a semiconductor wafer, and a POI value for each top structure of each field is determined based on the feature signals extracted by the feature extraction model.
Abstract: Disclosed are apparatus and methods for determining process or structure parameters for semiconductor structures. A plurality of optical signals is acquired from one or more targets located in a plurality of fields on a semiconductor wafer. The fields are associated with different process parameters for fabricating the one or more targets, and the acquired optical signals contain information regarding a parameter of interest (POI) for a top structure and information regarding one or more underlayer parameters for one or more underlayers formed below such top structure. A feature extraction model is generated to extract a plurality of feature signals from such acquired optical signals so that the feature signals contain information for the POI and exclude information for the underlayer parameters. A POI value for each top structure of each field is determined based on the feature signals extracted by the feature extraction model.
65Â citations
Patent•
04 Jun 2015TL;DR: In this article, a computer-implemented defect prediction method for a device manufacturing process involving processing a portion of a design layout onto a substrate is presented, the method comprising: identifying a hot spot from the portion of the design layout; determining a range of values of a processing parameter of the device manufacturing processes for the hot spot; determining an actual value of the processing parameter; determining or predicting, using the actual value, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the hot spots with the devicemanufacturing process.
Abstract: Disclosed herein is a computer-implemented defect prediction method for a device manufacturing process involving processing a portion of a design layout onto a substrate, the method comprising: identifying a hot spot from the portion of the design layout; determining a range of values of a processing parameter of the device manufacturing process for the hot spot, wherein when the processing parameter has a value outside the range, a defect is produced from the hot spot with the device manufacturing process; determining an actual value of the processing parameter; determining or predicting, using the actual value, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the hot spot with the device manufacturing process.
28Â citations
Patent•
16 Jul 2012TL;DR: In this paper, the authors proposed a method for analyzing a defect of an optical element for the extreme ultra-violet wavelength range comprising at least one substrate and at least a multi-layer structure.
Abstract: The invention refers to a method for analyzing a defect of an optical element for the extreme ultra-violet wavelength range comprising at least one substrate and at least one multi-layer structure, the method comprising the steps: (a) determining first data by exposing the defect to ultra-violet radiation, (b) determining second data by scanning the defect with a scanning probe microscope, (c) determining third data by scanning the defect with a scanning particle microscope, and (d) combining the first, the second and the third data.
21Â citations
Patent•
TSMC1
TL;DR: In this article, a system and method of automatically detecting failure patterns for a semiconductor wafer process is provided, which includes receiving a test data set collected from testing a plurality of semiconductors, forming a respective wafer map for each of the wafers, determining whether each wafer consists of one or more respective objects, selecting the wafer maps that are determined to comprise one or multiple respective objects.
Abstract: A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are determined to comprise one or more respective objects, selecting one or more object indices for selecting a respective object in each respective selected wafer map, determining a plurality of object index values in each respective selected wafer map, selecting an object in each respective selected wafer map, determining a respective feature in each of the respective selected wafer, classifying a respective pattern for each of the respective selected wafer maps and using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process.
10Â citations
Patent•
06 Feb 2012TL;DR: In this paper, a method for fabricating a photo mask is described, which includes collecting sample data, setting a preliminary mask layout, performing an optical proximity correction using the sample data and a pre-computed mask layout to obtain an optimized preliminary mask, verifying the optimized mask layout and fabricating the photo mask using the final mask layout.
Abstract: Methods of fabricating a photo mask are provided. The method includes collecting sample data, setting a preliminary mask layout, performing an optical proximity correction using the sample data and a preliminary mask layout to obtain an optimized preliminary mask layout, verifying the optimized preliminary mask layout to obtain a final mask layout, and fabricating the photo mask using the final mask layout. Verification of the optimized preliminary mask layout includes operating a verification simulator using the sample data and the optimized preliminary mask layout as input data to obtain verification image data. The verification image data includes a plurality of contours of a pattern at different vertical positions.
8Â citations
References
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Patent•
20 Nov 2006TL;DR: In this paper, a computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space.
Abstract: Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.
528Â citations
Patent•
28 Jan 2008TL;DR: In this article, a lithographic apparatus configured to project a patterned beam of radiation onto a target portion of a substrate is described, which includes a first radiation dose detector and a second radiation dose detectors, each detector comprising a secondary electron emission surface configured to receive a radiation flux and to emit secondary electrons due to the receipt of the radiation flux.
Abstract: A lithographic apparatus configured to project a patterned beam of radiation onto a target portion of a substrate is disclosed. The apparatus includes a first radiation dose detector and a second radiation dose detector, each detector comprising a secondary electron emission surface configured to receive a radiation flux and to emit secondary electrons due to the receipt of the radiation flux, the first radiation dose detector located upstream with respect to the second radiation dose detector viewed with respect to a direction of radiation transmission, and a meter, connected to each detector, to detect a current or voltage resulting from the secondary electron emission from the respective electron emission surface.
451Â citations
Patent•
26 Oct 2007TL;DR: In this article, a method of a single wafer wet/dry cleaning apparatus comprising of a transfer chamber having a wafer handler contained therein, a single wet cleaning chamber directly coupled to the transfer chamber, and a single Wafer ashing chamber was proposed.
Abstract: A method of a single wafer wet/dry cleaning apparatus comprising: a transfer chamber having a wafer handler contained therein; a first single wafer wet cleaning chamber directly coupled to the transfer chamber; and a first single wafer ashing chamber directly coupled to the transfer chamber.
374Â citations
Patent•
12 Sep 1990TL;DR: In this paper, a high degree of wafer-scale integration of normally incompatible IC devices is achieved by providing a plurality of segments, each segment having thereon one or more circuits, circuit elements, sensors and/or I/O connections.
Abstract: A high degree of wafer-scale integration of normally incompatible IC devices is achieved by providing a plurality of segments (10), each segment having thereon one or more circuits, circuit elements, sensors and/or I/O connections (14'). Each segment is provided with at least one edge (12) having an abutting portion (12a) capable of abutting against a similar edge of a neighboring segment. The segments are placed on the surface of a flotation liquid (20) and are allowed to be pulled together so as to mate abutting edges of neighboring segments, thereby forming superchips (10'). Microbridges (22) are formed between neighboring segments, such as by solidifying the flotation liquid, and interconnections (26) are formed between neighboring segments. In this manner, coplanar integration of semiconductor ICs is obtained, permitting mixed and normally incompatible circuit functions on one pseudomonolithic device as diverse as silicon and III-V digital circuits, III-V optoelectronic devices, static RAMs, charge coupled devices, III-V lasers, superconducting thin films, ferromagnetic non-volatile memories, high electron mobility transistors, and bubble memories, to name a few, to be integrated in any desired combination. The yieldable scale of integration of a given device technology is also greatly extended. The segments are brought together in a particulate-free fashion with high throughput and exacting reproducibility at low cost.
333Â citations
Patent•
09 Oct 2002TL;DR: In this article, a method for generating a photolithography mask for optically transferring a pattern formed in the mask onto a substrate utilizing an imaging system is presented, which includes the steps of: (a) defining a set of calibration patterns, which are represented in a data format; (b) printing the calibration patterns on a substrate using the given imaging system; (c) determining a first set of contour patterns corresponding to the calibration pattern imaged on the substrate; (d) generating a system pseudo-intensity function, which approximates the imaging performance of the imaging
Abstract: A method for generating a photolithography mask for optically transferring a pattern formed in the mask onto a substrate utilizing an imaging system. The method includes the steps of: (a) defining a set of calibration patterns, which are represented in a data format; (b) printing the calibration patterns on a substrate utilizing the given imaging system; (c) determining a first set of contour patterns corresponding to the calibration patterns imaged on the substrate; (d) generating a system pseudo-intensity function, which approximates the imaging performance of the imaging system; (e) determining a second set of contour patterns by utilizing the system pseudo-intensity function to define how the calibration patterns will be imaged in the substrate; (f) comparing the first set of contour patterns and the second set of contour patterns to determine the difference therebetween; (g) adjusting the system pseudo-intensity function until the difference between the first set of contour patterns and the second set of contour patterns is below a predefined criteria; and (h) utilizing the adjusted system pseudo-intensity function to modify the mask so as to provide for optical proximity correction.
308Â citations