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Figure 14: Power Dissipation with Different Class of SSTL
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Proceedings Article
•
DOI
•
SSTL I/O Standard based environment friendly energyl efficient ROM design on FPGA
[...]
Meenakshi Bansal
1
,
Neha Bansal
1
,
Rishita Saini
1
,
Bishwajeet Pandey
1
,
Lakshay Kalra
1
,
D. M. Akbar Hussain
2
- Show less
+2 more
•
Institutions (2)
Chitkara University
1
,
Aalborg University
2
01 Nov 2014
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