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Journal ArticleDOI

Stigmergy-Based Security for SoC Operations From Runtime Performance Degradation of SoC Components

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TLDR
Self-aware security modules attached with each IP works based on the Observe-Decide-Act paradigm and not only detects vulnerability but also organizes behavior of the IPs dynamically at runtime so that the high-level objective of task completion before a deadline is ensured.
Abstract
The semiconductor design industry of the embedded era has embraced the globalization strategy for system on chip (SoC) design. This involves incorporation of various SoC components or intellectual properties (IPs), procured from various third-party IP (3PIP) vendors. However, trust of an SoC is challenged when a supplied IP is counterfeit or implanted with a Hardware Trojan Horse. Both roots of untrust may result in sudden performance degradation at runtime. None of the existing hardware security approaches organize the behavior of the IPs at the low level, to ensure timely completion of SoC operations. However, real-time SoC operations are always associated with a deadline, and a deadline miss due to sudden performance degradation of any of the IPs may jeopardize mission-critical applications. We seek refuge to the stigmergic behavior exhibited in insect colonies to propose a decentralized self-aware security approach. The self-aware security modules attached with each IP works based on the Observe-Decide-Act paradigm and not only detects vulnerability but also organizes behavior of the IPs dynamically at runtime so that the high-level objective of task completion before a deadline is ensured. Experimental validation and low overhead of our proposed security modules over various benchmark IPs and crypto SoCs depict the prospects of our proposed mechanism.

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Citations
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Task Allocation in Ant Colonies

TL;DR: In this article, a mathematical model for studying the phenomenon of division of labor in ant colonies is proposed, and simple task allocation mechanisms can be used to achieve an optimal division of labour.
Journal ArticleDOI

Dynamic power-aware scheduling of real-time tasks for FPGA-based cyber physical systems against power draining hardware trojan attacks

TL;DR: This work explores how power draining ability of HTHs may reduce lifetime of the system and an offline–online scheduling strategy is proposed for periodic tasks which can ensure reliability of their operations till the expected lifetime ofThe system.
Journal ArticleDOI

Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware

TL;DR: This work initially explores how HTHs implanted by 3PIP vendors in the bitstreams may cause active attacks, and develops strategies to ensure reliability for processing of mixed critical tasks on reconfigurable hardware against HTH attacks.
Book ChapterDOI

Introduction to Hardware Security for FPGA Based Systems

TL;DR: In this paper, the authors proposed a method to detect power dissipation attacks that may affect the green computing factor of a system or may drain the power budget of the system and cause early expiry of the computer system.
Book ChapterDOI

Handling Power Draining Attacks

TL;DR: In this paper, the authors proposed an approach to ensure flexibility and reconfigurability of the processing resources by using field programmable gate arrays (FPGAs) for direct task execution in hardware.
References
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Journal ArticleDOI

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Proceedings ArticleDOI

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Proceedings ArticleDOI

Physical unclonable functions for device authentication and secret key generation

TL;DR: This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.
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