scispace - formally typeset
Search or ask a question
Proceedings ArticleDOI

Study of SEU effects in a Turbo Decoder Bit Error Rate

TL;DR: SEU effects in the BER of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of using an Autonomous Emulation System.
Abstract: Turbo Codes are used in satellites and deep-space exploration as an innovative solution for error control codes. Radiation effects could add noise levels above the correction capability of the wireless communication modules, even though turbo codes were assuring low Bit Error Rates. SEU effects in the BER of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of using an Autonomous Emulation System.
Citations
More filters
Proceedings ArticleDOI
05 Apr 2020
TL;DR: In this paper, the reliability of Turbo decoders implemented on FPGAs is evaluated and the Turbo decoder with Log-MAP algorithm exhibits a high reliability against SEUs, and the user memory is more reliable than the configuration memory.
Abstract: Turbo codes are widely used in satellite communications. When a Turbo decoder is implemented on a Field Programmable Gate Array (FPGA) in a space platform, it will suffer Single Event Upsets (SEUs) that can cause failures and disrupt communications. In this paper, the reliability of Turbo decoders implemented on FPGAs is evaluated. The Turbo decoder with Log-MAP algorithm is implemented on an SRAM-FPGA. Then, fault injection experiments are conducted to simulate the effects of SEU on the user memory and on the configuration memory of the Turbo decoder. Experimental results show that, for user memory, the SEU tolerance rate is over 95%, and the effect of SEU is related to the iteration period, bit position and Signal to Noise Ratio (SNR). In particular, SEUs on the control/address registers and on the interleaving table have a larger impact than on other registers or memories. For the configuration memory, the SEU tolerance rate is higher than 86%, and decreases as SNR increases. In general, the Turbo decoder exhibits a high reliability against SEUs, and the user memory is more reliable than the configuration memory.

6 citations


Cites methods from "Study of SEU effects in a Turbo Dec..."

  • ...References [11] and [18] used a hardware based autonomous fault emulation platform to evaluate the robustness of Turbo decoder to SEUs....

    [...]

Journal Article
TL;DR: Model of Turbo Decoder is presented, this model having two main advantages lowbit error rate and bit error rate is constant, not varies with signal to noise ratio, which is very helpful for decoding.
Abstract: Model of Turbo Decoder presents in this paper, this model having two main advantages low bit error rate and bit error rate is constant, not varies with signal to noise ratio, which is very helpful for decoding. Performance is increased due to these two factors. Key Words—Turbo Decoder, Bit Error Rate, Signal to Noise Ratio, Performance
References
More filters
Journal ArticleDOI
TL;DR: In this paper, a very fast and cost effective solution for SEU sensitivity evaluation is presented, which uses FPGA emulation in an autonomous manner to fully exploit the FPGAs emulation speed.
Abstract: The appearance of nanometer technologies has produced a significant increase of integrated circuit sensitivity to radiation, making the occurrence of soft errors much more frequent, not only in applications working in harsh environments, like aerospace circuits, but also for applications working at the earth surface. Therefore, hardened circuits are currently demanded in many applications where fault tolerance was not a concern in the very near past. To this purpose, efficient hardness evaluation solutions are required to deal with the increasing size and complexity of modern VLSI circuits. In this paper, a very fast and cost effective solution for SEU sensitivity evaluation is presented. The proposed approach uses FPGA emulation in an autonomous manner to fully exploit the FPGA emulation speed. Three different techniques to implement it are proposed and analyzed. Experimental results show that the proposed Autonomous Emulation approach can reach execution rates higher than one million faults per second, providing a performance improvement of two orders of magnitude with respect to previous approaches. These rates give way to consider very large fault injection campaigns that were not possible in the past

142 citations


"Study of SEU effects in a Turbo Dec..." refers methods in this paper

  • ...In particular, the fault injection technique used is the Autonomous Emulation method [6] where the complete fault injection system is implemented in an FPGA, speeding up the evaluation process....

    [...]

  • ...This tool profits from hardware emulation on platform FPGAs [6]....

    [...]

Journal ArticleDOI
Alister G. Burr1
TL;DR: It is shown that, far from bringing coding research to an end, turbo-codes have led to a renaissance, and other applications of the 'turbo-principle' have emerged, and these are discussed, along with the practical applications of turbo- codes that have appeared, from mobile radio to deep-space exploration.
Abstract: Turbo-codes have attracted a great deal of interest since their discovery in 1993. This paper reviews the reasons for this, in particular their attainment of the ultimate limits of the capacity of a communication channel. The paper describes the two fundamental concepts on which they are based: concatenated coding and iterative decoding. This latter is the real 'turbo-principle', which is the real secret of their remarkable performance. The paper also reviews the direction of research in this area since 1993, and shows that, far from bringing coding research to an end, turbo-codes have led to a renaissance. In particular, other applications of the 'turbo-principle' have emerged, and these are discussed, along with the practical applications of turbo-codes that have appeared, from mobile radio to deep-space exploration.

74 citations


"Study of SEU effects in a Turbo Dec..." refers background in this paper

  • ...Turbo codes have many practical applications in wireless communications for terrestrial and space systems since are able to reduce significantly the Bit Error Rate (BER) with a small number of decoding iterations [1]....

    [...]

Journal ArticleDOI
01 Sep 2008
TL;DR: In this article, the SEU sensitivity of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of an Autonomous Emulation System.
Abstract: Wireless communications were clearly enhanced since 90's thanks to Turbo Codes. The use of these codes in satellites and deep-space exploration could be ruined if radiation effects exceed their correction capability. SEU sensitivity of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of an Autonomous Emulation System. Specifically, around 34.5 million faults per test in a sweep for four different parameters have been injected. This analysis provides accurate information about the most sensitive parts in the circuit in order to perform a selective hardening of the circuit. Results points out that hardening just the 9% of the circuit flip-flops reduces the failure rate induced by SEUs in 56%.

5 citations


"Study of SEU effects in a Turbo Dec..." refers methods in this paper

  • ...Taking into account conclusions obtained in previous works [5] with respect to the more SEU sensitive parts of the Turbo Decoder the selected location to inject faults are the Control FSM, Configuration Values and Data Path memory elements....

    [...]

  • ...In [5] a deep SEU sensitivity analysis of the different parts of the Turbo Decoder was presented....

    [...]

Proceedings ArticleDOI
11 Dec 2006
TL;DR: The algorithm selection choices and the test bench policy during the design process of a communication system critical block such as a turbo decoder compliant with the DVB-RCS standard, based on the max-log-map algorithm are presented.
Abstract: For regenerative Telecom Satellite Systems, the turbo decoder has become a basic component of the On-Board Processing (OBP). This paper presents the algorithm selection choices and the test bench policy during the design process of a communication system critical block such as a turbo decoder compliant with the DVB-RCS standard (Digital Video Broadcast - Return Channel Satellite). The architecture, based on the Max-Log-Map algorithm, is described emphasising results and advantages of the storage requirement reduction policy applied. Secondly, the chosen test policy is presented, it has considered the specific Space environment requirements and difficulties to fulfil performance evaluations of some complex algorithms in a short period of time. This method has allowed a fast debugging and fine-tuning of the design in order to get the best area, frequency, and performance trade-off, together with having sped-up Bit Error Rate (BER) measurements to just days when normally it would have required weeks of operation.

4 citations


"Study of SEU effects in a Turbo Dec..." refers background in this paper

  • ...More details about algorithm implementation can be found in [3] and [4]....

    [...]

  • ...Space agencies and companies are including Turbo Code modules in their design libraries while making further research in the possibilities of their principles, concatenated coding and iterative decoding [2][3][4]....

    [...]

  • ...A complete characterization of Turbo Decoder developed by Thales Alenia Space had been reported in [4], but it is still necessary to check the effect of radiation on this module....

    [...]

01 Jun 2000
TL;DR: Very high integration levels of microelectronics will be required to fulfil the ever-increasing demands on performance in terms of processing speed, mass and power as mentioned in this paper, and the functionality being implemented will move away from the use of traditional components to more advanced and complex systems within a single device.
Abstract: Very high integration levels of microelectronics will be required to fulfil the ever-increasing demands on performance in terms of processing speed, mass and power. With an increasing number of available gates on silicon, the functionality being implemented will move away from the use of traditional components to more advanced and complex systems within a single device. To develop such complex circuits the design methodology will have to change from being gate-level oriented to the integration of complex building blocks. The designers will have to rely on preexisting building blocks with already verified functionality, with documentation and production test vectors being available, and which have ultimately been validated on silicon.

2 citations


"Study of SEU effects in a Turbo Dec..." refers background in this paper

  • ...Space agencies and companies are including Turbo Code modules in their design libraries while making further research in the possibilities of their principles, concatenated coding and iterative decoding [ 2 ][3][4]....

    [...]