Patent
Switching equipment for performing a switching operation for a high-speed packet in broadband Integrated Services Digital Network
Hiroshi Tomonaga,Naoki Matsuoka,Miwako Watanabe,Satoshi Kuroyanagi,Yutaka Ezaki,Akira Hakata,Ryuichi Takechi,Masaaki Kawai +7 more
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TLDR
In this paper, a line interface is provided for performing a switching process of a fixed length cell consisting of data and a cell header, where individual units are individually connected to the plurality of lines accommodated therein and individually process the cells.Abstract:
Switching equipment in provided for performing a switching process of a fixed length cell consisting of data and a cell header. A line interface provided in the switching equipment accommodates a plurality of lines and, at the same time, processes the data from each line on a cell unit. The line interface includes individual units and a common unit. The individual units are individually connected to the plurality of lines accommodated therein and individually process the cells. The common unit is connected to the individual units and, at the same time, effects batch-processing of the cells processed by the individual units.read more
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Patent
Allocated and dynamic bandwidth management
Stephen A. Caldara,Stephen A. Hauser,Thomas A. Manning,Robert B. McClure,Matthias L. Colsman +4 more
TL;DR: In this paper, an ATM network switch and method of utilization for adaptively providing integrated services therein is disclosed, in which the allocated bandwidth for one connection has been consumed, or if the connection is not entitled to allocated bandwidth, the connection can use dynamic bandwidth arbitration, or a combination of both allocated and dynamic.
Patent
Asynchronous transfer mode based service consolidation switch
TL;DR: In this paper, an asynchronous transfer mode (ATM) based service consolidation switch (10) includes an input/output module (22) having a TSPP processor (90) and a from-switch port processor (FSPP) (92) communicating with a bandwidth arbiter (114), multipoint topology controllers (116), and a data crossbar (117) on a switch control module (32).
Patent
Hierarchical resource management with maximum allowable allocation boundaries
TL;DR: In this paper, a system for managing resources such as buffers and bandwidth which are allocated to competing entities through two or more levels in a telecommunications network is disclosed, which provides a tool to allocate resources for use by individual entities.
Patent
Frame classification using classification keys
TL;DR: In this article, an improved method and apparatus for recognizing, classifying and processing frames received at a frame processor in a computer network is disclosed, where source and destination addresses are parsed from the frame.
Patent
Allocated and dynamic switch flow control
TL;DR: In this article, a method and apparatus for eliminating cell loss in a network switch through the use of flow control of both allocated and dynamic bandwidth is disclosed for eliminating the cell loss.
References
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Journal ArticleDOI
International standardization of BISDN
TL;DR: The status and technical characteristics of broadband ISDN (BISDN) as they are currently being defined by the International Consultative Committee for Telephone and Telegraph (CCITT) are outlined.
Patent
ATM communication apparatus and failure detection and notification circuit
TL;DR: In this paper, the same failure detection process is conducted for the detection of a failure state of a VP when a transmission line of the VP fails and detection of the failure state when a VP-AIS cell generated by another apparatus is received.
Patent
Fault notifying system for asynchronous transfer mode communication system
Osamu Sekihata,Susumu Eda,Katsumi Omuro,Ryuji Hyodo,Kenji Tanaka,Hiroyuki Hatta,Reiko Furuya +6 more
TL;DR: In this paper, the authors propose a fault notifying system that notifies a fault in an asynchronous transfer mode (ATM) network to at least one data terminating equipment (DTE).
Proceedings ArticleDOI
A VLSIC for the ATM switching system
TL;DR: In this article, an ATM switching IC has been fabricated with a throughput of 1.2 Ghps and uses a Bi-CMOS RAM and logic gate array for broadband ISDN.
Proceedings ArticleDOI
High-speed switching module for a large capacity ATM switching system
TL;DR: An ultra-high-speed asynchronous transfer mode (ATM) switching module having a highway throughput of 9.6 Gb/s using a HEMT process switch IC and a ceramic multichip substrate was developed and a simulation of both cell buffer operation and line characteristic is presented.