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System-on-Chip Design Using High-Level Synthesis Tools

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TLDR
This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis using HLS tools and Fast Fourier Transform implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware.
Abstract
This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.

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Proceedings ArticleDOI

High Level Synthesis of Complex Applications: An H.264 Video Decoder

TL;DR: A case study using HLS for a full H.264 decoder for an application with over 6000 lines of code and over 100 functions, and the experience on code conversion for synthesizability, various HLS optimizations, HLS limitations while dealing with complex input code, and general design insights are shared.
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Hardware Design of Real Time Epileptic Seizure Detection Based on STFT and SVM

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Voltage-Mode New Universal Biquad Filter Configuration Using a Single VDIBA

TL;DR: A universal voltage-mode filter configuration employing a voltage differencing inverting buffered amplifier, two capacitors and a resistor is proposed, and even the internal structure of the new building block is possibly the simplest among all recently introduced new building blocks.
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A New MISO-Type Voltage-Mode Universal Biquad Using Single VD-DIBA

TL;DR: A new multiple-input single-output-(MISO-)-type multifunction voltage-mode universal biquadratic filter employing single voltage differencing differential input buffered amplifier (VD-DIBA), two capacitors, and one resistor are proposed, which can realize second-order low pass, high pass, bandPass, band stop, and all pass filter responses without altering the circuit topology.
Book ChapterDOI

Very Large Scale Integration (VLSI) and ASICs

TL;DR: The continuing development of IC technology during the last couple of decades has led to a considerable increase in the number of devices per unit chip area, which currently allows the integration of a complete system on a chip (SOC) which may comprise hundreds of millions to a few billion transistors.
References
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Book

High-Level Synthesis: from Algorithm to Digital Circuit

TL;DR: This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia, and should be on each designers and CAD developers shelf.
Book

Digital Signal Processing 4th Edition

TL;DR: A significant revision of a best-selling text for the introductory digital signal processing course, this book presents the fundamentals of discrete-time signals, systems, and modern digital processing and applications for professional engineers in a best selling text for reference book has.
Book

ESL Design and Verification: A Prescription for Electronic System Level Methodology

TL;DR: ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today.
BookDOI

The VLSI handbook

TL;DR: System-Level Power Management: An Overview Ali Iranli and Massoud Pedram Communication-Based Design for Nanoscale SoCs and Design Flow Optimizations for Power-Aware FPGAs.
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