Temperature-Compensated $\beta$ -Multiplier Current Reference Circuit
01 Oct 2017-IEEE Transactions on Circuits and Systems Ii-express Briefs (IEEE)-Vol. 64, Iss: 10, pp 1162-1166
TL;DR: This brief presents the new simple schematic for the temperature stable current references based on the well-known -multiplier circuit, which achieves the supply sensitivity of several %/V without the use of the external bandgap voltage reference for the supply regulation.
Abstract: This brief presents the new simple schematic for the temperature stable current references based on the well-known $\boldsymbol {\beta }$ -multiplier circuit. The proposed reference utilizes only four MOS transistors and two lateral PNP transistors, which are usually available in standard CMOS technologies along with one well resistor. The temperature-compensation technique has a low process dependence and needs no trimming. However, resistor trimming can be used to precisely set the output current value. The circuit implementation of the proposed technique was fabricated in a standard 0.35- ${\mu }\text{m}$ CMOS process to source a 16- ${\mu }\text{A}$ current. The digital calibration circuit allows setting of the output current in 32 100 nA-steps. The proposed current reference achieves the supply sensitivity of several %/V without the use of the external bandgap voltage reference for the supply regulation. The measured temperature coefficient is 105 ppm/°C over the temperature range from 0 to 110 °C.
Citations
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TL;DR: This paper presents a low-power and high-precision voltage and current reference (VCR) in one simple circuit based on the threshold voltage difference between an I/O and standard transistors with temperature-independent bias current.
Abstract: This paper presents a low-power and high-precision voltage and current reference (VCR) in one simple circuit. The voltage reference is derived from the threshold voltage difference between an I/O (i.e., 3.3-V NMOS) and standard (i.e., 1.8-V NMOS) transistors with temperature-independent bias current, and the current reference is the voltage reference divided by a temperature-insensitive resistor. The resistor is made up by series connection of a proportional-to-absolute-temperature (PTAT) NWELL resistor and a complementary-to-absolute-temperature (CTAT) high-resistance poly resistor in series. Implemented in a standard 0.18- $\mu \text{m}$ CMOS process, the proposed VCR circuit takes an active area of only 0.055 mm2. The measured voltage and current references ( $\text{V}_{\mathrm {ref}}$ and $\text{I}_{\mathrm {ref}}$ ) at room temperature are 368 mV and 9.77 nA, respectively. The measured average temperature coefficient (TC) of $\text{V}_{\mathrm {ref}}$ and $\text{I}_{\mathrm {ref}}$ are 43.1 ppm/°C and 149.8 ppm/°C over a temperature range of −40~125°C with one-time trimming and the variation coefficients are 0.35% and 1.6%, respectively. The measured voltage and current line sensitivities are 0.027%/V and 0.6%/V, respectively. The minimum supply voltage is 0.7 V with a total power consumption of 28 nW. The measured power supply ripple rejection (PSRR) of $\text{V}_{\mathrm {ref}}$ is −65 dB @DC and −39.4 dB at frequencies higher than 1 Hz.
63 citations
Cites methods from "Temperature-Compensated $\beta$ -Mu..."
...In [19], the technique of dividing a PTAT voltage by a PTAT resistor is used to generate the temperature-insensitive current: Ire f = (V0 (1 + αV (T − T0))) / (R0 (1 + αR (T − T0))) (8)...
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Journal Article•
TL;DR: In this paper, an accurate current reference using temperature and process compensation current mirror (TPC-CM) is proposed, which uses two binary weighted current mirrors which control the temperature coefficient and magnitude of the reference current.
Abstract: In this paper, an accurate current reference using temperature and process compensation current mirror (TPC-CM) is proposed. The temperature independent reference current is generated by summing a proportional to absolute temperature (PTAT) current and a complementary to absolute temperature (CTAT) current. However, the temperature coefficient and magnitude of the reference current are influenced by the process variation. To calibrate the process variation, the proposed TPC-CM uses two binary weighted current mirrors which control the temperature coefficient and magnitude of the reference current. After the PTAT and CTAT current is measured, the switch codes of the TPC-CM is fixed in order that the magnitude of reference current is independent to temperature. And, the codes are stored in the non-volatile memory. In the simulation, the effect of the process variation is reduced to 0.52% from 19.7% after the calibration using a TPC-CM in chip-by-chip. A current reference chip is fabricated with a 3.3V 0.35um CMOS process. The measured calibrated reference current has 0.42% variation for C100C.
40 citations
TL;DR: This brief presents a low-power and high-precision bandgap voltage and current reference (BGVCR) in one simple circuit for battery-powered applications and shows how the temperature coefficient of the current reference can be optimized.
Abstract: This brief presents a low-power and high-precision bandgap voltage and current reference (BGVCR) in one simple circuit for battery-powered applications. All the amplifiers have been eliminated in the proposed circuit. The voltage reference is derived from the bandgap topology, and the current reference is obtained by summing a proportional-to-absolute-temperature (PTAT) current and a complementary-to-absolute-temperature (CTAT) current. Therefore, the temperature coefficient of the current reference can be optimized. Besides, a pseudo-cascode structure and a simple line sensitivity enhancement circuit are adopted to improve the current mirror accuracy and line sensitivity. The proposed circuit is fabricated in a 0.18- ${\mu }\text{m}$ deep N-well CMOS process with an active area of 0.063 mm2. The measured $\text{V}_{\mathrm{ REF}}$ and $\text{I}_{\mathrm{ REF}}$ are 1.2 V and 51 nA, respectively. The $\text{V}_{\mathrm{ REF}}$ and $\text{I}_{\mathrm{ REF}}$ show measured average temperature coefficients of 32.7 ppm/°C and 89 ppm/°C at a temperature of −45 to 125°C and standard deviations of 0.17 % and 1.15 %, respectively. In the supply voltage range of 2 to 5 V, the line sensitivities of voltage and current are 0.058%/V and 1.76%/V, respectively. The minimum supply voltage is 2 V with a total power consumption of 192 nW at room temperature.
34 citations
Cites background or methods from "Temperature-Compensated $\beta$ -Mu..."
...Another method of building a current reference is to use an amplifier to clamp the reference voltage to a resistor to form a voltage-to-current (V-I) converter [5]....
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...The TC of the current reference in [5] is improved by temperature compensation, but its operating temperature range is small....
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TL;DR: A resistorless high-precision compensated CMOS bandgap voltage reference (BGR) is presented, which is compatible with a standard CMOS process and can be greatly eliminated with proper mathematical operations of high-order temperature currents.
Abstract: A resistorless high-precision compensated CMOS bandgap voltage reference (BGR), which is compatible with a standard CMOS process, is presented in this paper. A higher-order curvature correction method called base-emitter voltage linearization is adapted to directly compensate the thermal nonlinearity of base–emitter voltage. With proper mathematical operations of high-order temperature currents, most of the nonlinear temperature terms in $V_{\mathrm {BE}}$ can be greatly eliminated. The proposed BGR, which is implemented in 0.35- $\mu \text{m}$ CMOS technology, is capable of working down to 2 V supply voltages with 1.14055 V mean output voltage. A minimum temperature coefficient of 1.01 ppm/°C with a temperature range from −40 °C to 125 °C is realized, and a power-supply noise attenuation of 61 dB is achieved without any filter capacitors. The line regulation is better than 2 mV/V from 2 V to 5 V supply voltage while dissipating a maximum supply current of $33~\mu \text{A}$ . The active area of the presented BGR is 180 $\mu \text {m}\times 220\,\,\mu \text{m}$ .
32 citations
Additional excerpts
...temperature-dependent resistor ratio compensation [18]–[20],...
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TL;DR: A curvature-compensated resistor-less bandgap reference (BGR) that utilizes successive voltage-step compensation to produce a temperature-insensitive voltage reference (VR) and a supply noise bypassing technique is adopted to achieve good power supply rejection performance up to high frequency.
Abstract: A curvature-compensated resistor-less bandgap reference (BGR), which is fabricated in 0.5- $\mu \text{m}$ CMOS process, is proposed in this paper. The BGR utilizes successive voltage-step compensation to produce a temperature-insensitive voltage reference (VR), including one $\Delta V_{\text {GS}}$ step for first-order compensation and another one for higher order curvature correction. Moreover, a supply noise bypassing technique is adopted to achieve good power supply rejection performance up to high frequency. Experimental results demonstrate that this BGR is able to produce a VR of 1.196 V with a temperature coefficient of 3.98 ppm/°C at 3.6-V supply voltage. A power-supply noise attenuation of −84 dB@100 Hz and −37 dB@100 kHz are easily achieved, and the line regulation is better than 0.19 mV/V when supply voltage varies from 2.1 to 5 V. The proposed reference occupies an active area of $356 \,\,\mu \text {m} \times 150 \,\,\mu \text{m}$ and consumes a quiescent current of $38~\mu \text{A}$ .
24 citations
References
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TL;DR: In this paper, an analytical expression for the electron and hole mobility in silicon based on both experimental data and modified Brooks-Herring theory of mobility was derived, which allows one to obtain electron and holes mobility as a function of concentration up to \sim 10^{20} cm-3 in an extended and continuous temperature range (250-500 K) within ± 13 percent of the reported experimental values.
Abstract: An analytical expression has been derived for the electron and hole mobility in silicon based on both experimental data and modified Brooks-Herring theory of mobility. The resulting expression allows one to obtain electron and hole mobility as a function of concentration up to \sim 10^{20} cm-3in an extended and continuous temperature range (250-500 K) within ± 13 percent of the reported experimental values.
886 citations
TL;DR: A new circuit integrated on silicon, which generates temperature-independent bias currents, is described, which shows good thermal performance and in particular, the new second-order temperature-compensated current reference has a mean temperature drift of only 28 ppm//spl deg/C.
Abstract: This paper describes a new circuit integrated on silicon, which generates temperature-independent bias currents. Such a circuit is firstly employed to obtain a current reference with first-order temperature compensation, then it is modified to obtain second-order temperature compensation. The operation principle of the new circuits is described and the relationships between design and technology process parameters are derived. These circuits have been designed by a 0.35 /spl mu/m BiCMOS technology process and the thermal drift of the reference current has been evaluated by computer simulations. They show good thermal performance and in particular, the new second-order temperature-compensated current reference has a mean temperature drift of only 28 ppm//spl deg/C in the temperature range between -30/spl deg/C and 100/spl deg/C.
127 citations
"Temperature-Compensated $\beta$ -Mu..." refers methods in this paper
...A similar principle is also used by the reference circuits described in [2]....
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TL;DR: A trim-free low-voltage and low-power CMOS current reference which achieves high current stability to temperature variation and process-insensitive temperature compensation and employs ratio between the process-independent temperature coefficients of resistor and compensation voltage.
Abstract: This paper presents a trim-free low-voltage and low-power CMOS current reference which achieves high current stability to temperature variation. In order to achieve process-insensitive temperature compensation, the proposed circuit employs ratio between the process-independent temperature coefficients of resistor and compensation voltage. The proposed current reference is implemented in 0.18-μm CMOS technology and consumes 1.4 μW from a 1-V supply. It achieves temperature coefficient of 24.9 ppm/°C with 0 °C to 100 °C of temperature variation without trimming, which is the lowest among the recently reported CMOS current references.
75 citations
"Temperature-Compensated $\beta$ -Mu..." refers background or methods in this paper
...Another popular design technique uses the relation of PTAT voltage to the PTAT resistance [1]–[3], [10]–[14]....
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...Although the current reference [10] has much better TC, it has to use an additional bandgap voltage reference (BGVR) for supply because of the large line sensitivity (over 90%/V)....
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...The reference reported in [10] provides an outstanding TC, but lacks very high line sensitivity, so the external BGVR is needed to provide functionality....
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03 Nov 2014
TL;DR: This paper proposes a MOSFET-only, 20pA, 780ppm/°C current reference that consumes 23pW and exploits subthreshold-biased MOSfETs and a complementary-to-absolute temperature (CTAT) gate voltage to compensate for temperature dependency.
Abstract: This paper proposes a MOSFET-only, 20pA, 780ppm/°C current reference that consumes 23pW. The ultra-low power circuit exploits subthreshold-biased MOSFETs and a complementary-to-absolute temperature (CTAT) gate voltage to compensate for temperature dependency. The design shows low supply voltage sensitivity of 0.58%/V and a load sensitivity of 0.25%/V.
54 citations
"Temperature-Compensated $\beta$ -Mu..." refers background in this paper
...These values look competitive, especially among realized in silicon references [8], [12], [13]....
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22 Dec 2009
TL;DR: In this paper, an accurate current reference using temperature and process compensation current mirror (TPC-CM) is proposed, which uses two binary weighted current mirrors which control the temperature coefficient and magnitude of the reference current.
Abstract: In this paper, an accurate current reference using temperature and process compensation current mirror (TPC-CM) is proposed. The temperature independent reference current is generated by summing a proportional to absolute temperature (PTAT) current and a complementary to absolute temperature (CTAT) current. The temperature coefficient and magnitude of the reference current are influenced by the process variation. To calibrate the process variation, the proposed TPC-CM uses two binary weighted current mirrors which control the temperature coefficient and magnitude of the reference current. After the PTAT and CTAT currents are measured, the switch codes of the TPC-CM are fixed in order that the magnitude of reference current is independent to temperature. And, the codes are stored in the non-volatile memory. In the simulation, the effect of the process variation is reduced to 0.52% from 19.7% after the calibration using a TPC-CM in chip-by-chip. A current reference chip is fabricated with a 3.3V 0.35um CMOS process. The measured calibrated reference current has 0.42% variation.
49 citations
"Temperature-Compensated $\beta$ -Mu..." refers background or methods in this paper
...The exact values of the single resistors were found during the optimization process in the Cadence Virtuoso environment to provide a smooth increase of the resistance of the bank by the increasing the digital code of the CAL....
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...The bank resistors RP0 − RP1 and RN1 − RN4 could be shunted by setting the CAL[0] − CAL[4] signals to Fig....
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...The overall resistance, when all CAL[x] signals are close to Vdd (CAL = 31), is 2.045 k ....
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...CAL = 15 was applied to all samples....
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...Output value calibration range measured at 37 ◦C, TC over the calibration range, output current over the temperature range for calibration register value (CAL) 20 (the current is set to the nominal value) and output current over temperature range for CAL = 8 (the current is set to minimize TC over the temperature range)....
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