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Journal ArticleDOI

Temperature sensors and voltage references implemented in CMOS technology

01 Jan 2001-IEEE Sensors Journal (IEEE)-Vol. 1, Iss: 3, pp 225-234
TL;DR: It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages and dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise.
Abstract: This paper reviews the concepts, opportunities and limitations of temperature sensors and voltage references realized in CMOS technology. It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages. Furthermore, it is shown that dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise. The effects of mechan- ical stress are a major source of inaccuracy. In CMOS technology, the mechanical-stress effects are small, as compared to those in bipolar technology. It is concluded that, with low-cost CMOS tech- nolog, rather accurate voltage references and temperature sensors can be realized.
Citations
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Journal ArticleDOI
05 Dec 2005
TL;DR: In this paper, a low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process.
Abstract: A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.

366 citations


Cites background from "Temperature sensors and voltage ref..."

  • ...If the bitstream in a given clock cycle is zero, is integrated, while is integrated if the bitstream is one....

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  • ...The integrator operates in two phases....

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  • ...In the case of a substrate PNP transistor, which is biased via its emitter, the resulting collector current is affected by the transistor’s current gain....

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  • ...Nevertheless, most temperature sensors applied today are conventional sensors, such as thermistors or platinum resistors, which require separate readout circuitry....

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  • ...In CMOS, substrate bipolar transistors can be used for this purpose [2]....

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Journal ArticleDOI
01 Jan 2006
TL;DR: This paper describes the embedded feedback and control system on a 90-nm Itanium family processor, code-named Montecito, that maximizes performance while staying within a target power and temperature envelope and presents measured results that show a 31% reduction in power for only a 10% drop in frequency.
Abstract: This paper describes the embedded feedback and control system on a 90-nm Itanium family processor, code-named Montecito, that maximizes performance while staying within a target power and temperature (PT) envelope. This system, referred to as Foxton Technology (FT), utilizes on-chip sensors and an embedded microcontroller to measure PT and modulate both voltage and frequency (VF) to optimize performance while meeting PT constraints. Changing both VF takes advantage of the cubic relationship of P/spl prop/CV/sup 2/F. We present measured results that show a 31% reduction in power for only a 10% drop in frequency. Montecito is able to implement FT using only 0.5% of the die area and 0.5% of the die power.

338 citations


Cites background from "Temperature sensors and voltage ref..."

  • ...There are a number of existing solutions for measuring on-die temperature [9], [10], with many based on the...

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Proceedings ArticleDOI
18 Mar 2010
TL;DR: This paper describes a temperature sensor realized in a 65nm CMOS process with a batch-calibrated inaccuracy of ±0.5°C (3s) and a trimmed inaccuracy from −70°C to 125°C that represents a 10-fold improvement in accuracy compared to other deep-submicron temperature sensors.
Abstract: This paper describes a temperature sensor realized in a 65nm CMOS process with a batch-calibrated inaccuracy of ±0.5°C (3s) and a trimmed inaccuracy of ±0.2°C (3s) from −70°C to 125°C. This represents a 10-fold improvement in accuracy compared to other deep-submicron temperature sensors [1,2], and is comparable with that of state-of-the-art sensors implemented in larger-feature-size processes [3,4]. The sensor draws 8.3µA from a 1.2V supply and occupies an area of 0.1mm2, which is 45 times less than that of sensors with comparable accuracy [3,4]. These advances are enabled by the use of NPN transistors as sensing elements, the use of dynamic techniques i.e. correlated double sampling (CDS) and dynamic element matching (DEM), and a single room-temperature trim.

125 citations


Additional excerpts

  • ...As shown in [20], this spread is PTAT in nature, and can be cancelled simply by trimming the bias current used to generate , i....

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Journal ArticleDOI
TL;DR: In this article, the authors analyzed the nonidealities of temperature sensors based on substrate pnp transistors and showed how their influence can be minimized by taking the temperature dependency of the effective emission coefficient into account.
Abstract: This paper analyzes the nonidealities of temperature sensors based on substrate pnp transistors and shows how their influence can be minimized. It focuses on temperature measurement using the difference between the base-emitter voltages of a transistor operated at two current densities. This difference is proportional to absolute temperature (PTAT). The effects of series resistance, current-gain variation, high-level injection, and the Early effect on the accuracy of this PTAT voltage are discussed. The results of measurements made on substrate pnp transistors in a standard 0.5-/spl mu/m CMOS process are presented to illustrate the effects of these nonidealities. It is shown that the modeling of the PTAT voltage can be improved by taking the temperature dependency of the effective emission coefficient into account using the reverse Early effect. With this refinement, the temperature can be extracted from the measurement data with an absolute accuracy of /spl plusmn/0.1/spl deg/C in the range of -50 to 130/spl deg/C.

110 citations


Cites background from "Temperature sensors and voltage ref..."

  • ...Because of their more ideal behavior and their lower sensitivity to stress [4], [1], substrate transistors are preferred for temperature sensing....

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  • ...When such a transistor is operated at two different emitter currents, the difference in base-emitter voltage is proportional to absolute temperature (PTAT) [1]....

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  • ...Dynamic element matching techniques can be applied to prevent mismatches between the transistors or current sources affecting the measurement [8], [1]....

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Journal ArticleDOI
TL;DR: This paper describes a time-domain temperature sensor based on a successive approximation algorithm that achieves the best ever accuracy among inverter-delay-based smart temperature sensors.
Abstract: This paper describes a time-domain temperature sensor based on a successive approximation algorithm. Without using any bipolar transistor, a temperature sensor composed of a temperature-dependent delay line (TDDL) is utilized to generate a delay proportional to the measured temperature. A binary-weighted adjustable reference delay line (ARDL) is adopted with an effective delay varied by a SAR control logic to approximate the TDDL delay for output coding. For linearity enhancement, a curvature compensation between both delay lines is invented to achieve the best ever accuracy among inverter-delay-based smart temperature sensors. With two-point calibration, a -0.4°C ˜ +0.6°C inaccuracy (3σ) over a 0°C ˜ 90°C temperature operation range has been measured for 23 test chips. With 10 output bits, the proposed sensor achieves a resolution better than 0.1°C and a chip area of 0.6 mm2 in a TSMC 0.35-μm standard digital CMOS process. The sensor's average current consumption is 11.1 μA at a conversion rate of 2 samples/s.

108 citations

References
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Journal ArticleDOI
TL;DR: A compact model of bipolar transistors suitable for network analysis computer programs is presented, through the use of a new charge control relation linking junction voltages, collector current, and base charge, which substantially exceeds that of existing models of comparable complexity.
Abstract: We present in this paper a compact model of bipolar transistors, suitable for network analysis computer programs. Through the use of a new charge control relation linking junction voltages, collector current, and base charge, the model includes high injection effects. The performance substantially exceeds that of existing models of comparable complexity. For low bias and with some additional idealization, the model reduces to the conventional Ebers-Moll model.

635 citations


"Temperature sensors and voltage ref..." refers background in this paper

  • ...Physically, the nonunity of can be explained from the temperature dependency of the depletion-layer width [13]....

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Journal ArticleDOI
01 Dec 2000
TL;DR: In this paper, the authors presented an improvement of the chopper amplifier concept, called the nested helicopter amplifier, which reduced the residual offset to <100 nV, while retaining minimal thermal noise in the signal band.
Abstract: Offset and 1/f noise have been major enemies for analog IC designers since the enormous increase of the market for digital applications forced them to develop analog front ends in standard CMOS technology. Because static techniques like trimming cannot reduce 1/f noise, solutions had to be found in dynamic offset cancellation. The current work presents an improvement of the chopper amplifier concept, called the nested chopper amplifier. It is shown that with this architecture the residual offset is reduced to <100 nV, while retaining minimal thermal noise in the signal band.

292 citations


"Temperature sensors and voltage ref..." refers methods in this paper

  • ...Applying auto-zeroing [4], chopping technique [10], and auto-calibration [8] can solve these problems....

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  • ...[10] showed how to reduce the offset problem, using a nested-chopper instrumentation amplifier....

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Journal ArticleDOI
TL;DR: In this article, the authors present various methods of utilizing bipolar transistors and integrated circuits as temperature transducers and compare the accuracy, stability and calibration problems of different transducers compared with each other.

177 citations


"Temperature sensors and voltage ref..." refers background in this paper

  • ...The stress-induced change in the characteristic of bipolar transistors is the main cause of the long-term drift and hysteresis during thermal cycling or humidity changing of bandgap references [5], [14]....

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  • ...Regarding the long-term drift and instability of npn-transistor temperature sensors in [14], a value of about 0....

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  • ...Using low-cost plastic packagin, the stress will vary over the range of 150 MPa [14], depending on temperature and long-term variations....

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Journal ArticleDOI
TL;DR: A method for developing a reference voltage in CMOS integrated circuits is described, and the principle of the suggested voltage reference is explained and the final implementation is presented.
Abstract: A method for developing a reference voltage in CMOS integrated circuits is described. The circuit uses MOS devices operating in the weak inversion region, as well as a bipolar device formed without process modifications. A brief description of this region of operation is given. Then, the principle of the suggested voltage reference is explained and the final implementation is presented. Higher order effects are discussed, and results from an integrated prototype given.

156 citations

Journal ArticleDOI
TL;DR: In this paper, an NMOS voltage reference was developed that exhibits extremely low drift with temperature, which is based on the difference between the gate/source voltages of enhancement and depletion-mode NMOS transistors.
Abstract: An NMOS voltage reference has been developed that exhibits extremely low drift with temperature. The reference is based on the difference between the gate/source voltages of enhancement and depletion-mode NMOS transistors. The theoretical dependence of the reference voltage on both device and circuit parameters is analyzed and conditions for optimal performance are derived. The reference NMOS transistors are biased to the optimizing current levels by a unique feedback circuit. The measured output voltage drift in the integrated realization agrees well with theory and is less than 5 parts per million per degree Celsius over the temperature range -55/spl deg/ to +125/spl deg/C.

144 citations


"Temperature sensors and voltage ref..." refers methods in this paper

  • ...I N CMOS technology, both MOS and bipolar transistors can be applied to generate the basic signals for temperature sensors and voltage references [1]–[4]....

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