Proceedings ArticleDOI
The architecture, instruction set and development support for the WE ® DSP32 digital signal processor
J. Boddie,W. Hays,J. Tow +2 more
- Vol. 11, pp 421-424
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TLDR
The DSP32 architecture is reviewed, its full instruction set is presented, two complete program examples are presented, and a description of the software and hardware support tools are described.Abstract:
The WE®DSP32 Digital Signal Processor is a general purpose programmable single chip digital signal processor with 32-bit floating point arithmetic. The device can be cost effectively used in a wide variety of complex digital signal processing applications such as speech recognition, high speed modems, low bit rate voice coders, multi-channel signaling systems and signal processing workstations. This paper reviews the DSP32 architecture, presents its full instruction set, two complete program examples, and a description of the software and hardware support tools.read more
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BookDOI
Applications of digital signal processing to audio and acoustics
Mark Kahrs,Karlheinz Brandenburg +1 more
TL;DR: There are whole classes of algorithms that the speech community is not interested in pursuing or using in digital signal processing of sound and these algorithms and techniques are revealed in this book.
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A digital signal processor with IEEE floating-point arithmetic
G.R.L. Sohie,K.L. Kloker +1 more
TL;DR: The 96002 achieves compatibility with other processors and databases, higher mathematical accuracy, and better error handling than implementations that do not conform to the IEEE standard, resulting in a smaller-footprint, lower-cost system than other microprocessors or data-path chips.
Journal ArticleDOI
The Motorola DSP56000 Digital Signal Processor
TL;DR: The DSP56000 brings 10.25-MIPS performance to digital signal processing and retains enough similarities to other Motorola microprocessors to make it easy to learn and program.
Proceedings ArticleDOI
Recent advances in speech processing
TL;DR: The author introduces the methodological novelties that allowed for progress along three axes: from isolated-word recognition to continuous speech, from speaker-dependent recognition to speaker-independent, and from small vocabularies to large vocabULARies.
Journal ArticleDOI
The DSP32C: AT&Ts second generation floating point digital signal processor
TL;DR: The authors describe the DSP32C's instruction set, architecture, and application development tools, which includes an assembler, a simulator, an optimizing C compiler, and special-purpose hardware.
References
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FILSYN—A general purpose filter synthesis program
TL;DR: A very general computer program is described that can be used for the synthesis of passive LC, active RC, and (infinite impulse response) digital filters, which offers many firsts, including the passive realization of complex quadruplets of transmission zeros.
Journal ArticleDOI
A 32-bit VLSI digital signal processor
W.P. Hayes,R.N. Kershaw,L.E. Bays,J. Boddie,E.M. Fields,R.L. Freyman,C.J. Garen,J. Hartung,J.J. Klinikowski,C.R. Miller,K. Mondal,H.S. Moscovitz,Y. Rotblum,W.A. Stocker,J. Tow,L.V. Tran +15 more
TL;DR: A general-purpose programmable digital signal processor (DSP) has been implemented in 1.5-/spl mu/m (L/SUB eff/) NMOS technology using full-custom circuit design for high performance.
Proceedings ArticleDOI
A programmable digital signal processor with 32b floating point arithmetic
R. Kershaw,L. Bays,R. Freyman,J. Klinikowski,C. Miller,K. Mondal,H. Moscovitz,W. Stocker,Luan Tran,W. Hays,J. Boddie,E. Fields,C. Garen,J. Tow +13 more
TL;DR: A report on a programmable DSP with 32b floating point arithmetic, 32b data path, and an extensive 32b instruction set, implemented in 1.5μ NMOS technology, will be presented.