Proceedings ArticleDOI
The channel intersection problem in the building block style layout
P.-F. Dubois
- pp 528-531
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TLDR
A new routing region definition and ordering algorithm are presented for building block layout consisting of rectangular blocks that enables a router to deal with the channel intersections efficiently, while permitting the expansion of any region when being routed.Abstract:
A new routing region definition and ordering algorithm are presented for building block layout consisting of rectangular blocks. In contrast to other works, this algorithm enables a router to deal with the channel intersections efficiently, while permitting the expansion of any region when being routed. Before this algorithm is run, it is assumed that proper routing space has been assigned between the circuit blocks, so that the expansion of a region does not greatly affect the general structure. The algorithm starts from the classic set of channels. Each channel is then decomposed into several rectangular regions. If N is the number of channels, there will be around 2N regions at the end of the process. A constraint graph defines the order in which the regions should be routed. Routing results are given to illustrate the efficiency of this new scheme. >read more
Citations
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Journal ArticleDOI
Channel/switchbox definition for VLSI building-block layout
TL;DR: An algorithm to decompose the routing area into straight channels and rectangular switchboxes corresponding to line segments in the routing structure of the placement such that the number of switchboxes is minimized, is presented.
Journal ArticleDOI
Minimizing the number of switchboxes for region definition and ordering assignment
Jin-Tai Yan,Pei-Yung Hsiao +1 more
TL;DR: A region definition and ordering assignment (RDAOA) algorithm on minimizing the number of switchboxes is proposed, and the experimental results show that the algorithm defines fewer switchboxes than other algorithms.
Proceedings ArticleDOI
CHEOPS: an integrated VLSI floor planning and chip assembly system implemented in object oriented Lisp
Christian Masson,Denis Barbier,Remy Escassut,Daniel Winer,Gregory Chevallier,Pierre François Zeegers +5 more
TL;DR: Presents the architecture and capabilities of the CHEOPS floor planning and chip assembly system which was implemented in LeLisp using object-oriented programming.
Journal ArticleDOI
An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering
TL;DR: An efficient cut-based algorithm on minimizing the number of L-shaped channels in channel definition of a floorplan graph is proposed, and the time complexity of the algorithm is proved to be in O(n) time.
Proceedings ArticleDOI
An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering
TL;DR: The experimental results show that the proposed algorithm defines fewer L- shaped channels than Dai's and Cai's algorithms in the definition of straight and L-shaped channels for the assignment of safe routing ordering.
References
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Journal ArticleDOI
Routing Region Definition and Ordering Scheme for Building-Block Layout
TL;DR: A new routing region definition and ordering (RRDO) scheme for building block layout that defines and orders channels so that when a new channel is being routed, its width can be expanded or contracted without destroying the previously routed channels.
Proceedings ArticleDOI
The "PI" (Placement And Interconnect) System
TL;DR: The structure of PI is reviewed, and details on the signal-routing heuristics are presented, focusing on the definition of "channels", the global router, the "crossing placer", and the channel routers.
Proceedings ArticleDOI
Routing L-Shaped Channels in Nonslicing-Structure Placement
TL;DR: Experimental results show that both approaches for the L-shaped channel-routing problem provide good solutions, and all the vertical constraints substituted by 45° constraints can be directly mapped into the straight-type channels problem.
Proceedings ArticleDOI
A Dynamic and Efficient Representation of Building-Block Layout
TL;DR: Dynamic layout representation is a key problem in developing a building block layout system and this work has unified topological and geometrical representations, and developed efficient methods to update topological information after geometric operations.
Proceedings ArticleDOI
Hierarchical placement for macrocells: a 'meet in the middle' approach
TL;DR: A combination of top-down and bottom-up heuristics is used to make best use of a hierarchical description and experimental results show a considerable improvement over previous approaches.