The electromechanical response of silicon nanowires to buckling mode transitions
TL;DR: The highly flexible silicon nanowires embedded in SiO(2) microbridges exhibited unusually large fracture strength, sustaining tensile strains up to 5.6%; this will prove valuable in demanding flexible sensors.
Abstract: Here we show how the electromechanical properties of silicon nanowires (NWs) are modified when they are subjected to extreme mechanical deformations (buckling and buckling mode transitions), such as those appearing in flexible devices. Flexible devices are prone to frequent dynamic stress variations, especially buckling, while the small size of NWs could give them an advantage as ultra-sensitive electromechanical stress sensors embedded in such devices. We evaluated the NWs post-buckling behavior and the effects of buckling mode transition on their piezoresistive gauge factor (GF). Polycrystalline silicon NWs were embedded in SiO2 microbridges to facilitate concurrent monitoring of their electrical resistance without problematic interference, while an external stylus performed controlled deformations of the microbridges. At points of instability, the abrupt change in the buckling configuration of the microbridge corresponded to a sharp resistance change in the embedded NWs, without altering the NWs' GF. These results also highlight the importance of strategically positioning the NW in the devices, since electrical monitoring of buckling mode transitions is feasible when the deformations impact a region where the NW is placed. The highly flexible NWs also exhibited unusually large fracture strength, sustaining tensile strains up to 5.6%; this will prove valuable in demanding flexible sensors.
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TL;DR: In this article, a manipulation probe and an atomic force microscope (AFM) tip were used in scanning electron microscopy (SEM) to investigate the mechanical behavior of a single SiNW underbuckling and bending conditions.
Abstract: Theexisting literature reports progress in observing the phenom-enon of plasticity and in measuring the elastic modulus ofsingle NWs or NW arrays. In this Communication, we reportusing a manipulation probe and an atomic force microscope(AFM) tip in scanning electron microscopy (SEM) toinvestigate the mechanical behavior of a single SiNW underbuckling and bending conditions. Some of the mechanicalproperties of SiNWs have been quantified. Our study hasdemonstrated the tough and robust behavior of SiNWs.The SiNWs used for our experiments were fabricated bychemical vapor deposition by the vapor–liquid–solid (VLS)growth process.
130 citations
TL;DR: This report combined the electrical biasing with the application of mechanical stress, which impacts the charge carriers' concentration, to achieve an electrically controlled giant piezoresistance in nanowires.
Abstract: Herein we demonstrate giant piezoresistance in silicon nanowires (NWs) by the modulation of an electric field-induced with an external electrical bias. Positive bias for a p-type device (negative for an n-type) partially depleted the NWs forming a pinch-off region, which resembled a funnel through which the electrical current squeezed. This region determined the total current flowing through the NWs. In this report, we combined the electrical biasing with the application of mechanical stress, which impacts the charge carriers’ concentration, to achieve an electrically controlled giant piezoresistance in nanowires. This phenomenon was used to create a stress-gated field-effect transistor, exhibiting a maximum gauge factor of 5000, 2 orders of magnitude increase over bulk value. Giant piezoresistance can be tailored to create highly sensitive mechanical sensors operating in a discrete mode such as nanoelectromechanical switches.
113 citations
TL;DR: It is shown that a stress-induced modulation of the surface depletion region width can explain giant uniaxial piezoresistance in p-type silicon nanowires that is almost two orders of magnitude larger than that found in bulk silicon.
Abstract: To the Editor — Rongrui He and Peidong Yang have reported giant uniaxial piezoresistance in p-type silicon nanowires that is almost two orders of magnitude larger than that found in bulk silicon1. Here, I show that a stress-induced modulation of the surface depletion region width can explain these results. This is by no means a new phenomenon. Ferdinand Braun, who discovered current rectification at a point contact in 1874, knew of the effect. Braun’s ‘cat’s whisker’ diodes are notoriously unreliable because good rectification, which requires the formation of a depletion region at a point contact, depends on the pressure applied at the contact. The same is true for the point contact transistor invented in 1947 at Bell Laboratories. With the arrival of the bipolar (buried) junction transistor in 1951, contact pressure effects on transistor operation were no longer technologically relevant. To paraphrase Warner and Grung2: nobody cared anymore. However, with the advent of nanoscale semiconductor devices with high surface-area-to-volume ratios, it is perhaps time to quantify the effect of mechanical stress on surface depletion layers. For the p-type silicon nanowires (SiNWs) studied by He and Yang, the contacts are of the standard type used in modern silicon devices and so the depletion region occurs not at a point contact, but laterally along the surface (see Fig. 1a, inset). He and Yang observed large stress effects in nanowires with high resistivities and small diameters. For such nanowires it can be shown with textbook formulae3 that w ≥ d/2, where w is the width of the depletion region and d is the diameter of the nanowire. Here, I numerically calculate the effect of stress by solving the Poisson–Boltzmann equation in two dimensions using finite element methods (a modified version of the MOSFET model available from COMSOL) for diameters between 80 and 280 nm and resistivities, ρ, between 0.01 and 10 Ω cm. This differential equation is strongly nonlinear and care must be taken to ensure numerical convergence. Variations in w occur via a stress-induced modulation of the surface potential barrier, φ, defined as the difference between the valence band edge at the surface and in the bulk of the semiconductor. The only fitting parameter is dφ/dX, where X is the applied stress. The bulk piezoresistance effect4 is accounted for and it is assumed that φ = 0.54 eV (half the forbidden gap) at X = 0. The zero stress current–voltage (I–V) characteristics are found to vary, as expected, from ohmic to non-ohmic behaviour depending on resistivity and diameter. Taking dφ/dX = 0.5 meV MPa–1, and for an applied bias V = 0.2 V, the X dependence of the relative conductance change, Δσ/σ0, is well reproduced (Fig. 1a), with the forms being dependent only on the degree of surface depletion and V. (The z-like behaviour reported by He and Yang appears to be anomalous and is probably related to spatial nonuniformities in the dopant distribution, which can be important in the thinnest wires.) Moreover, variations in the firstorder stress coefficient, πl, similar to those measured by He and Yang are obtained (Fig. 1b). The actual value of dφ/dX will depend on the density and (piezoresistive) Silicon nanowires feel the pinch
94 citations
TL;DR: In this article, the silicon nanowires are also presented as nano-temperature sensors in two configurations, i.e., resistance temperature detector (RTD) and diode temperature detector(DTD) types.
Abstract: The paper elaborates the silicon nanowire (SiNW) arrays fabrication using standard CMOS compatible technologies (top–down) with each array consisting of 100 wires, which are individually electrically measurable for their conductance and facilitating statistical analysis. To facilitate real-time analysis, the arrays are integrated with micro-fluidics for the delivery of various chemicals for surface modification, buffer solutions, bio-molecules/analytes, etc. The silicon nanowires are also presented as nano-temperature sensors in two configurations, i.e. as resistance temperature detector (RTD) and diode temperature detector (DTD) types. RTD type sensors have shown temperature coefficient of resistance (TCR) values ∼7500 ppm/K which are enhanced beyond 10,000 ppm/K by the application of back-bias. DTD type sensors using nanowires have recorded more than one order variation in reverse-bias current, in the temperature range of 293–373 K. Both the types of nano-temperature sensors are highly sensitive and can be integrated with other bio-chemical sensors in lab-on-chip devices. Nanowire array fabrication details in particular as nano-temperature sensor are elaborated here along with their characterization.
79 citations
TL;DR: In this paper, the internal stresses present in thin dielectric films are studied for mono and multi-layers composed of thermal oxide, LPCVD nitride and densified PECVD oxide.
76 citations