Thermal properties of very fast transistors
IBM1
TL;DR: In this paper, a mathematical model of the three-dimensional transient heat flow problem is presented which takes into account the physical structure of the device and the actual region of power dissipation.
Abstract: Recent predictions that thermal effects will limit future transistor speed improvement motivated an interest in predicting and measuring these effects. A mathematical model of the three-dimensional transient heat flow problem is presented which takes into account the physical structure of the device and the actual region of power dissipation. At any point within the device, the model predicts the time-dependent temperature response to a change in power dissipation. A new method of measuring the local time-dependent thermal behavior of small bipolar transistors is described and used to verify the model. It was found that the thermal spreading resistance becomes important in silicon transistors when the emitter stripe dimensions approach 1 µ. Furthermore, the thermal response is much slower than the electrical response. Also, it was confirmed that adjacent devices in integrated circuits are essentially thermally isolated as far as thermal spreading resistance is concerned.
Citations
More filters
••
TL;DR: In this article, the authors present recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures, including silicon transistors, carbon nanostructures, and semiconductor nanowires.
Abstract: Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (∼10−8 W) to massive data centers (∼109 W) is surveyed. Then, focus is given to energy dissipation in nanoscale circuits, silicon transistors, carbon nanostructures, and semiconductor nanowires. Concepts of steady-state and transient thermal transport are also reviewed in the context of nanoscale devices with sub-nanosecond switching times. Finally, recent directions regarding energy transport are reviewed, including electrical and thermal conductivity of nanostructures, thermal rectification, and the role of ubiquitous material interfaces.
Open image in new window
994 citations
Cites background from "Thermal properties of very fast tra..."
...This can be extended to a rectangular heat source (width W, length L) by replacing D ≈ (LW)1/2 and including additional three-dimensional heat spreading shape factors [71, 81]....
[...]
...For longer time scales, comparable to or larger than the device thermal time constants, several models have been proposed [81, 84, 88, 94, 95]....
[...]
••
TL;DR: In this article, the authors present recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures, including silicon transistors, carbon nanostructures, and semiconductor nanowires.
Abstract: Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (~10^-8 W) to massive data centers (~10^9 W) is surveyed. Then, focus is given to energy dissipation in nanoscale circuits, silicon transistors, carbon nanostructures, and semiconductor nanowires. Concepts of steady-state and transient thermal transport are also reviewed in the context of nanoscale devices with sub-nanosecond switching times. Finally, recent directions regarding energy transport are reviewed, including electrical and thermal conductivity of nanostructures, thermal rectification, and the role of ubiquitous material interfaces.
838 citations
•
01 Jan 1984
TL;DR: In this paper, a liquid partially fills an array of micron-wide repentant capillaries in the heat sink substrate, so that surface tension holds the polished back of an IC in intimate thermal contact with the sink.
Abstract: : The design of high-speed integrated circuits and systems is often constrained by thermal considerations. As late as 1981 it was authoritatively predicted that the maximum achievable power flux for liquid-cooled, densely-packed integrated circuits (ICs) would be about 20 W/sq cm. Convective heat-transfer theory indicates that well over 1000 W/sq cm can be compactly removed from ICs at normal operating temperatures, provided microscopic (e.g., 50-microns wide) extended-surface structures are used. The difficulty of constructing high-conductance, low-stress thermal interfaces between ICs and heat sinks suggests the use of an integral heat sink. Accordingly, IC microfabrication techniques were employed to design, fabricate, and test novel, ultracompact water-cooled, laminar-flow, optimized plate-fin and pin-fin heat sinks directly within standard-thickness silicon substrates. Worst-case thermal resistances as low as 0.083 deg C/W were measured from 1-sq cm thin-film resistors (e.g., a 108 deg C temperature rise at 1309 W), in good agreement with predictions. Further increases in heat transfer are achievable. The use of integral liquid-cooled heat sinks in multichip systems presents potential yield, reliability, cost and packaging problems. Attachment of unmodified ICs to micro-heat sinks seems a more attractive approach. A novel die-attachment technique has been developed which avoids the problems of conventional attachments. In this technique, a liquid partially fills an array of micron-wide repentant capillaries in the heat sink substrate, so that surface tension holds the polished back of an IC in intimate thermal contact with the heat sink. The bond is void-free, virtually stress-free, long-lived, and allows repeated detachment and replacement of ICs without damaging the heat sink substrate. The repentant grooves were fabricated by a novel process using electroless plating of nickel onto vertical silicon microgrooves.
217 citations
••
01 Dec 1993
TL;DR: In this paper, the incomplete Choleski conjugate gradient (ICCG) method was used to simulate the thermal characteristics of integrated circuits and transient electrothermal performance using asymptotic waveform evaluation (AWE).
Abstract: This paper describes new techniques for simulating the DC and steady-state thermal characteristics of integrated circuits using the incomplete Choleski conjugate gradient (ICCG) method, and transient electrothermal performance using an efficient macromodeling method based on asymptotic waveform evaluation (AWE). Results on several benchmark circuits show orders of magnitude reductions in CPU time and memory with accuracy comparable to that of the traditional techniques. >
108 citations
••
TL;DR: In this paper, a spectral domain decomposition approach is presented for the time-dependent thermal modeling of complex nonlinear (3-D) electronic systems, from metallized power FETs and MMICs through MCMs, up to circuit board level.
Abstract: An original, fully analytical, spectral domain decomposition approach is presented for the time-dependent thermal modeling of complex nonlinear (3-D) electronic systems, from metallized power FETs and MMICs, through MCMs, up to circuit board level. This solution method offers a powerful alternative to conventional numerical thermal simulation techniques, and is constructed to be compatible with explicitly coupled electrothermal device and circuit simulation on CAD timescales. In contrast to semianalytical, frequency space, Fourier solutions involving DFT-FFT, the method presented here is based on explicit, fully analytical, double Fourier series expressions for thermal subsystem solutions in Laplace transform s-space (complex frequency space). It is presented in the form of analytically exact thermal impedance matrix expressions for thermal subsystems. These include double Fourier series solutions for rectangular multilayers, which are an order of magnitude faster to evaluate than existing semi-analytical Fourier solutions based on DFT-FFT. They also include double Fourier series solutions for the case of arbitrarily distributed volume heat sources and sinks, constructed without the use of Green's function techniques, and for rectangular volumes with prescribed fluxes on all faces, removing the adiabatic sidewall boundary condition. This combination allows treatment of arbitrarily inhomogeneous complex geometries, and provides a description of thermal material nonlinearities as well as inclusion of position varying and non linear surface fluxes. It provides a fully physical, and near exact, generalized multiport network parameter description of nonlinear, distributed thermal subsystems, in both the time and frequency domains. In contrast to existing circuit level approaches, it requires no explicit lumped element, RC-network approximation or nodal reduction, for fully coupled, electrothermal CAD. This thermal impedance matrix approach immediately gives rise to minimal boundary condition independent compact models for thermal systems. Implementation of the time-dependent thermal model as N-port netlist elements within a microwave circuit simulation engine, Transim (NCSU), is described. Electrothermal transient, single-tone, two-tone, and multitone harmonic balance simulations are presented for a MESFET amplifier. This thermal model is validated experimentally by thermal imaging of a passive grid array representative of one form of spatial power combining architecture.
106 citations
Cites methods from "Thermal properties of very fast tra..."
...The data for this figure took less than 1 s to generate on a 500 MHz Pentium processor and consists of 65 frequency points....
[...]
References
More filters
••
TL;DR: The thermal conductivity of single crystals of pure n-type germanium and of p-type Germanium containing from 10$ 14$ to 10$ 19$ group III impurity atoms per cm$^{3}$ has been measured from 2 to 90 degrees K in some cases the readings have been extended up to room temperature as discussed by the authors.
Abstract: The thermal conductivity of single crystals of pure n-type germanium and of p-type germanium containing from 10$^{14}$ to 10$^{19}$ group III impurity atoms per cm$^{3}$ has been measured from 2 to 90 degrees K In some cases the readings have been extended up to room temperature Whereas the low-temperature conductivity of the pure specimens is that which one would expect from a dielectric crystal, the addition of even very small amounts of group III impurity decreases the conductivity very considerably and alters its temperature dependence It is suggested that the extra thermal resistance introduced is due to the scattering of the lattice vibrations by the electrons or holes in the impurity energy levels The theory of such scattering has been worked out by Ziman, and the experimental results are shown to be in fair agreement with this theory A pure n-type silicon single crystal and a gold-doped p-type silicon crystal show a behaviour similar to the germanium The room-temperature conductivity of germanium and silicon is 0$\cdot $64 and 1$\cdot $45 watt units respectively
85 citations
••
IBM1
TL;DR: This article examines physical problems and limits of logical circuitry at increasingly higher current densities, and offers the most directly effective solution to the dilemma-lower operating temperature.
Abstract: Transistorized computer logic has made steady progress toward higher speeds by reducing the dimensions of circuits and devices. However, even though circuit and device speeds have increased by three orders of magnitude, voltage, current, and power levels have remained about the same. Power dissipation at increasingly higher current densities seems to be leading to difficult thermal problems that will eventually limit the progress of logical circuitry toward higher speeds. This article examines these physical problems and limits, and offers the most directly effective solution to the dilemma?lower operating temperature.
57 citations
••
IBM1
TL;DR: In this article, the results of a study of the design factors and performance of germanium circuits at low temperatures are described, with comparisons to silicon circuits, and the effect of temperature on circuit propagation delay is emphasized.
Abstract: Low temperature operation of emitter-coupled logic circuits offers potential advantages in reliability, noise immunity, power dissipation, and speed. Experimental picosecond germanium integrated circuits exhibit significant improvements in delay with moderate cooling, in contrast to observed degradation in the performance of comparable silicon circuits. The results of a study of the design factors and performance of germanium circuits at low temperatures are described, with comparisons to silicon. The effect of temperature on circuit propagation delay is emphasized. Brief discussions are included relating observed circuit and transistor temperature dependences to those of more fundamental parameters and processes.
15 citations
••
TL;DR: Calculations based upon material properties indicate a considerable advantage to germanium over silicon for high-speed logic-switching applications, due largely to the better electron and hole mobilities for germanum.
Abstract: Recent advances in semiconductor technology make possible a planar technology for germanium similar to that used for silicon integrated circuits. Calculations based upon material properties indicate a considerable advantage to germanium over silicon for high-speed logic-switching applications.This is due largely to the better electron and hole mobilities for germanium. Switching circuit delays have been measured in both germanium and siliconin hybrid and integrated circuit form. For a given level of device sophistication (measured in terms of the stripe widths used on the devices) the germanium circuits are about three times faster than the equivalent silicon circuits.
6 citations