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Proceedings ArticleDOI

Thermal stability of electroplated copper thin-film interconnections

01 Aug 2015-
TL;DR: There were local distributions of the crystallinity and resistance in a test interconnection and the maximum temperature appeared in the local area with the minimum crystallinity, which can be explained by the decrease of Joule heating under the application of a fixed current density.
Abstract: There were local distributions of the crystallinity and resistance in a test interconnection. The local resistance of the interconnection varied with the local crystallinity. The maximum temperature appeared in the local area with the minimum crystallinity, in other words, the area with the highest resistance under the application of high current density of 10 MA/cm2. Thus, local high Joule heating occurred in the test interconnection due to the local variation of the crystallinity of the interconnection. The maximum temperature decreased from about 170°C to 140°C when the average crystallinity (IQ value which was obtained from EBSD analysis) increased from 3000 to 4100. This decrease of the maximum temperature can be explained by the decrease of Joule heating under the application of a fixed current density. This decrease of the maximum temperature increased the long-term reliability of the interconnections drastically.
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Journal ArticleDOI
TL;DR: In this paper, a generic, low-cost and thermal-enhanced 3D IC integration SiP with a passive interposer has been proposed for high performance applications, which uses chip-to-chip interconnections through a passive TSV interposers in a SiP format with excellent thermal management.
Abstract: Purpose – The purpose of this paper is to focus on through‐silicon via (TSV), with a new concept that every chip or interposer could have two surfaces with circuits. Emphasis is placed on the 3D IC integration, especially the interposer (both active and passive) technologies and their roadmaps. The origin of 3D integration is also briefly presented.Design/methodology/approach – This design addresses the electronic packaging of 3D IC integration with a passive TSV interposer for high‐power, high‐performance, high pin‐count, ultra fine‐pitch, small real‐estate, and low‐cost applications. To achieve this, the design uses chip‐to‐chip interconnections through a passive TSV interposer in a 3D IC integration system‐in‐package (SiP) format with excellent thermal management.Findings – A generic, low‐cost and thermal‐enhanced 3D IC integration SiP with a passive interposer has been proposed for high‐performance applications. Also, the origin of 3D integration and the overview and outlook of 3D Si integration and 3...

256 citations


"Thermal stability of electroplated ..." refers background in this paper

  • ...[1-5] However, the mechanical properties of the electroplated copper thin films, such as Young’s modulus and tensile strength vary drastically comparing with those of conventional bulk copper [6-10]....

    [...]

Journal ArticleDOI
01 Jan 2009

209 citations


"Thermal stability of electroplated ..." refers background in this paper

  • ...[1-5] However, the mechanical properties of the electroplated copper thin films, such as Young’s modulus and tensile strength vary drastically comparing with those of conventional bulk copper [6-10]....

    [...]

Journal ArticleDOI
TL;DR: Analytical and finite-element models of heat transfer in stacked 3D ICs are developed and it is shown that package and heat sink thermal resistances play a more important role in determining temperature rise compared to thermal resistsances intrinsic to the multidie stack.
Abstract: Three-dimensional (3D) interconnection technology offers several electrical advantages, including reduced signal delay, reduced interconnect power, and design flexibility. 3D integration relies on through-silicon vias (TSVs) and the bonding of multiple active layers to stack several die or wafers containing integrated circuits (ICs) and provide direct electrical interconnection between the stacked strata. While this approach provides several electrical benefits, it also offers significant challenges in thermal management. While some work has been done in the past in this field, a comprehensive treatment is still lacking. In the current work, analytical and finite-element models of heat transfer in stacked 3D ICs are developed. The models are used to investigate the limits of thermal feasibility of 3D electronics and to determine the improvements required in traditional packaging in order to accommodate 3D ICs. An analytical model for temperature distribution in a multidie stack with multiple heat sources is developed. The analytical model is used to extend the traditional concept of a single-valued junction-to-air thermal resistance in an IC to thermal resistance and thermal sensitivity matrices for a 3D IC. The impact of various geometric parameters and thermophysical properties on thermal performance of a 3D IC is investigated. It is shown that package and heat sink thermal resistances play a more important role in determining temperature rise compared to thermal resistances intrinsic to the multidie stack. The improvement required in package and heat sink thermal resistances for a 3D logic-on-memory implementation to be thermally feasible is quantified. An increase in maximum temperature in a 3D IC compared to an equivalent system-in-package (SiP) is predicted. This increase is found to be mainly due to the reduced chip footprint. The increased memory die temperature in case of memory-on-logic integration compared to a SiP implementation is identified to be a significant thermal management challenge in the future. The results presented in this paper may be useful in the development of thermal design guidelines for 3D ICs, which are expected to help maximize the electrical benefits of 3D technology without exacerbating thermal management issues when implemented in early-stage electrical design and layout tools.

150 citations


"Thermal stability of electroplated ..." refers background in this paper

  • ...[1-5] However, the mechanical properties of the electroplated copper thin films, such as Young’s modulus and tensile strength vary drastically comparing with those of conventional bulk copper [6-10]....

    [...]

Journal ArticleDOI
TL;DR: Thermal performances of 3D IC integration system-in-package (SiP) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer and CFD (computational fluid dynamic) analyses.

84 citations


"Thermal stability of electroplated ..." refers background in this paper

  • ...[1-5] However, the mechanical properties of the electroplated copper thin films, such as Young’s modulus and tensile strength vary drastically comparing with those of conventional bulk copper [6-10]....

    [...]

Journal ArticleDOI
TL;DR: In this article, the effects of current density and deposition time on sheet resistance and resistivity of electroplated Cu layer were investigated with respect to thickness, surface roughness, microstructure, grain size, and texture.
Abstract: This study was performed to investigate the effects of current density and deposition time on sheet resistance and resistivity of electroplated Cu layer. Cu layer covered on sputtered Si/Ta/22Cu-78Ta/Cu films was electroplated with current densities of 1, 1.5 and 2 A/dm2, and the deposition times varied from 20 to 100 min. The effects of current density and deposition time on the thickness of Cu layers and the current efficiency were investigated. The variation in sheet resistance and resistivity were discussed with respect to thickness, surface roughness, microstructure, grain size, and texture. In general, it was found that surface roughness might not be the dominate parameter, but the density of nodule boundary in the porous films would affect the electrical property of the electroplating Cu. An increasing extent of the (1 1 1) preferred orientation tends to loosen the nodules and lower the sheet resistance and resistivity of Cu layers. A decrease in the current density and an increase in deposition time tend to produce a Cu layer with (1 1 1) preferred orientation and results in relatively low sheet resistance and resistivity.

47 citations


"Thermal stability of electroplated ..." refers background in this paper

  • ...[1-5] However, the mechanical properties of the electroplated copper thin films, such as Young’s modulus and tensile strength vary drastically comparing with those of conventional bulk copper [6-10]....

    [...]