Time-Based PWM Controller for Fully Integrated High Speed Switching DC-DC Converters — An Alternative to Conventional Analog and Digital Controllers
27 Mar 2018-pp 226-231
TL;DR: The concept of time based proportional-integral-derivative (PID) controller with complete architecture of a time-based buck converter is presented and was successfully demonstrated on silicon with implementation of 10-25MHz single phase and 30-70MHz 4-phase buck converters on 180nm and 65nm CMOS processes, respectively.
Abstract: This tutorial discusses design of a highly integrated, low quiescent current continuous time PWM controller using time-based signal processing. By virtue of the continuous-time digital nature of the time-based PWM controller, it is capable of achieving very high resolution and speed without using any error amplifier and large compensation capacitor or any high resolution A/D converter and digital PWM while preserving all the benefits of both analog and digital PWM controllers. Using time as the processing variable, the controller operates with CMOS-level digital-like signals but without adding any quantization error. A voltage/current controlled ring oscillator is used as an integrator in place of conventional opamp-RC or Gm-C integrator while a voltage/current controlled delay line is used to perform voltage-to-time conversion. Starting with trade-offs with high speed design of conventional analog and digital PWM controllers, the concept of time based proportional-integral-derivative (PID) controller with complete architecture of a time-based buck converter is presented. The technique was successfully demonstrated on silicon with implementation of 10-25MHz single phase and 30-70MHz 4-phase buck converters on 180nm and 65nm CMOS processes, respectively.
References
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TL;DR: In this paper, the presence of steady-state limit cycles in digitally controlled PWM converters is discussed, and conditions on the control law and quantization resolution for their elimination are suggested.
Abstract: This paper discusses the presence of steady-state limit cycles in digitally controlled pulse-width modulation (PWM) converters, and suggests conditions on the control law and the quantization resolution for their elimination. It then introduces single-phase and multi-phase controlled digital dither as a means of increasing the effective resolution of digital PWM (DPWM) modules, allowing for the use of low resolution DPWM units in high regulation accuracy applications. Bounds on the number of bits of dither that can be used in a particular converter are derived. Finally, experimental results confirming the theoretical analysis are presented.
735 citations
"Time-Based PWM Controller for Fully..." refers background in this paper
...It requires high precision analog-to-digital converter (ADC) and DPWM to avoid limit cycling [5] and maintain good accuracy in the regulated output voltage....
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TL;DR: In this article, the authors present a detailed review of integrated magnetics technologies, primarily microinductors, a key component in realizing a monolithic power converter, and propose the use of two performance metrics or figures of merit in order to compare the dc and ac performance of individual microinductor structures.
Abstract: This paper reviews the current state of power supply technology platforms and highlights future trends and challenges toward realizing fully monolithic power converters. This paper presents a detailed survey of relevant power converter technologies, namely power supply in package and power supply on chip (PwrSoC). The performance of different power converter solutions reported in the literature is benchmarked against existing commercial products. This paper presents a detailed review of integrated magnetics technologies, primarily microinductors, a key component in realizing a monolithic power converter. A detailed review and comparison of different microinductor structures and the magnetic materials used as inductor cores is presented. The deposition techniques for integrating the magnetic materials in the microinductor structures are discussed. This paper proposes the use of two performance metrics or figures of merit in order to compare the dc and ac performance of individual microinductor structures. Finally, the authors discuss future trends, key challenges, and potential solutions in the realization of the “holy grail” of monolithically integrated power supplies (PwrSoC).
280 citations
"Time-Based PWM Controller for Fully..." refers background in this paper
...However, with parasitic reduction in state-of-the-art semiconductor process, packaging, and passive component technologies, switching losses are minimized significantly and remain less dominant when converter is operated at full load [2]....
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TL;DR: A key innovation is the explicit use of the oscillator's output phase to avoid the signal distortion that had severely limited the performance of earlier VCO-based ADCs, which had made use of its output frequency only.
Abstract: The use of a VCO-based integrator and quantizer within a continuous-time (CT) ΔΣ analog-to-digital converter (ADC) structure is explored, and a custom prototype in a 0.13 μm CMOS with a measured performance of 81.2/78.1 dB SNR/SNDR over a 20 MHz bandwidth while consuming 87 mW from a 1.5 V supply and occupying an active area of 0.45 mm2 demonstrated. A key innovation is the explicit use of the oscillator's output phase to avoid the signal distortion that had severely limited the performance of earlier VCO-based ADCs, which had made use of its output frequency only. The proposed VCO-based integrator and quantizer structure enables fourth-order noise shaping with only three opamp-based integrators.
202 citations
Proceedings Article•
01 Jan 2004
TL;DR: A dual-mode digitally controlled buck converter IC for cellular phone applications employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology.
Abstract: This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm 2 in 0.25-μm CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 μA.
169 citations
"Time-Based PWM Controller for Fully..." refers methods in this paper
...Light load efficiency can be improved by using burst mode control and segmented output control can also be used to further improve the efficiency [3], [4]....
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10 Jun 2014
TL;DR: A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented.
Abstract: A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented. The silicon measured a peak efficiency of 68% and consumed an area of 0.6mm
2
(without output decoupling) with a power density of about 410 mW/mm
2
. The paper also demonstrates a controller bandwidth of 43MHz; the highest reported to date for any digital controller, resulting in output voltage ramp rates as high as 10V/μsec.
58 citations
"Time-Based PWM Controller for Fully..." refers methods in this paper
...Light load efficiency can be improved by using burst mode control and segmented output control can also be used to further improve the efficiency [3], [4]....
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