Open AccessBook
Tradeoffs and Optimization in Analog CMOS Design
Reads0
Chats0
TLDR
In this paper, the authors present hand expressions motivated by the EKV MOS model and measured data for MOS device performance, including velocity saturation and other small-geometry effects.Abstract:
The selection of drain current, inversion coefficient, and channel length for each MOS device in an analog circuit results in significant tradeoffs in performance. The selection of inversion coefficient, which is a numerical measure of MOS inversion, enables design freely in weak, moderate, and strong inversion and facilitates optimum design. Here, channel width required for layout is easily found and implicitly considered in performance expressions. This paper gives hand expressions motivated by the EKV MOS model and measured data for MOS device performance, inclusive of velocity saturation and other small-geometry effects. A simple spreadsheet tool is then used to predict MOS device performance and map this into complete circuit performance. Tradeoffs and optimization of performance are illustrated by the design of three, 0.18-mum CMOS operational transconductance amplifiers optimized for DC, balanced, and AC performance. Measured performance shows significant tradeoffs in voltage gain, output resistance, transconductance bandwidth, input-referred flicker noise and offset voltage, and layout area.read more
Citations
More filters
Journal ArticleDOI
Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K
TL;DR: In this paper, the authors presented an experimental investigation, compact modeling, and low-temperature physics-based modeling of a commercial 28-nm bulk CMOS technology operating at cryogenic temperatures.
Journal ArticleDOI
Engineering Negative Differential Resistance in NCFETs for Analog Applications
Harshit Agarwal,Pragya Kushwaha,Juan Pablo Duarte,Yen-Kai Lin,Angada B. Sachid,Ming-Yen Kao,Huan-Lin Chang,Sayeef Salahuddin,Chenming Hu +8 more
TL;DR: It is demonstrated that the NDR effect for NCFET in the static limit can be engineered to reduce degradation in short-channel devices without compromising the subthreshold gain, which is crucial for analog applications.
MonographDOI
Systematic Design of Analog CMOS Circuits: Using Pre-Computed Lookup Tables
Paul G. A. Jespers,Boris Murmann +1 more
TL;DR: This book will provide professional analog circuit designers, researchers, and graduate students with the theoretical know-how and practical tools needed to acquire a systematic and re-use oriented design style for analog integrated circuits in modern CMOS.
Proceedings ArticleDOI
Cryogenic characterization of 28 nm bulk CMOS technology for quantum computing
Arnout Beckers,Farzan Jazaeri,Andrea Ruffino,Claudio Bruschini,Andrea Baschirotto,Christian Enz +5 more
TL;DR: It is found that the simplified charge-based EKV model can accurately predict the cryogenic behavior and represents a main step towards the design of analog/RF circuits integrated in an advanced bulk CMOS process and operating at cryogenic temperature for quantum computing control systems.
References
More filters
Journal ArticleDOI
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Journal ArticleDOI
A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
TL;DR: In this paper, a new design methodology based on a unified treatment of all the regions of operation of the MOS transistor is proposed for the design of CMOS analog circuits and especially suited for low power circuits where the moderate inversion region often is used.
Journal ArticleDOI
An MOS transistor model for analog circuit design
TL;DR: A physically based model for the metal-oxide-semiconductor (MOS) transistor suitable for analysis and design of analog integrated circuits is presented.
Book
Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design
Christian Enz,Eric A. Vittoz +1 more
TL;DR: In this article, the authors present a short history of the EKV most model and its application in IC design, and present an extended version of the model with an extended charge-based model.