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Journal ArticleDOI

True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching

02 Mar 2021-IEEE Electron Device Letters (IEEE)-Vol. 42, Iss: 4, pp 505-508
TL;DR: In this paper, the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching were studied. And the results suggest that the BV and over voltage margin of HEMTs in practical power switching can be significantly underestimated using the static BV.
Abstract: This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. These results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV.
Citations
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Journal ArticleDOI
TL;DR: In this article, the authors provide a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability, which is a key missing piece to realize the full GaN platform with integrated digital, power, and RF electronics technologies.
Abstract: GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

83 citations

Journal ArticleDOI
TL;DR: In this paper, the authors implemented beveled-mesa NiO/Ga2O3 p-n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, achieving high conversion efficiency of 98.5% with 100-min stable operating capability.
Abstract: The technical progress of Ga2O3 power diodes is now stuck at a critical point where a lack of performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization. In this letter, by implementing beveled-mesa NiO/Ga2O3 p–n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, high conversion efficiency of 98.5% with 100-min stable operating capability has been demonstrated. In particular, rugged reliability is validated after over 1 million times dynamic breakdown with a 1.2-kV peak overvoltage. Meanwhile, superior device performance is achieved, including a static breakdown voltage (BV) of 1.95 kV, a dynamic BV of 2.23 kV, a forward current of 20 A (2 kA/cm2 current density), and a differential specific on -resistance of 1.9 mΩ·cm2. These results indicate that Ga2O3 power HJDs are developing rapidly with their own advantages, presenting the enormous potential in high-efficiency, high-power, and high-reliability applications.

49 citations

Journal ArticleDOI
TL;DR: In this paper , the performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization, and a beveled-mesa NiO/Ga was implemented in a 500-W power factor correction (PFC) system circuit.
Abstract: The technical progress of Ga 2 O 3 power diodes is now stuck at a critical point where a lack of performance evaluation and reliability validation at the system-level applications seriously limits their further development and even future commercialization. In this letter, by implementing beveled-mesa NiO/Ga 2 O 3 p–n heterojunction diodes (HJDs) into a 500-W power factor correction (PFC) system circuit, high conversion efficiency of 98.5% with 100-min stable operating capability has been demonstrated. In particular, rugged reliability is validated after over 1 million times dynamic breakdown with a 1.2-kV peak overvoltage. Meanwhile, superior device performance is achieved, including a static breakdown voltage (BV) of 1.95 kV, a dynamic BV of 2.23 kV, a forward current of 20 A (2 kA/cm 2 current density), and a differential specific on -resistance of 1.9 mΩ·cm 2 . These results indicate that Ga 2 O 3 power HJDs are developing rapidly with their own advantages, presenting the enormous potential in high-efficiency, high-power, and high-reliability applications.

39 citations

Journal ArticleDOI
TL;DR: In this article , the authors investigated the failure and degradation of GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests and provided new insights into the surge-energy and overvoltage robustness of cascode GaNHEMTs.
Abstract: Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC mosfet s can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and an Si mosfet , is still lacking. This article fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by avalanche in the Si mosfet . In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4–1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8–2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency dependent. At 100 kHz, the failure boundary (∼1.3 kV) is even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices show large but recoverable parametric shifts. All these failure and degradation behaviors can be explained by the buffer trapping in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si mosfet avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs.

29 citations

Journal ArticleDOI
TL;DR: In this paper , the authors demonstrate that the avalanche current in GaN JFETs can be tuned to flow through the source, by using either a mosfet driver with a large gate resistance or an RC-interface driver.
Abstract: The 1.2-kV vertical gallium nitride (GaN) fin-channel junction-gate field-effect transistor (JFET) has recently emerged as a promising candidate for power electronics. It is normally off and has a specific on-resistance smaller than that of 1.2-kV SiC mosfets. A robust avalanche capability has also been reported in vertical GaN JFETs with an avalanche current flowing through the gate. This avalanche path differs from that of power mosfets (via the source) and may pose challenges in gate driver reliability. This article, for the first time, demonstrates that the avalanche current in GaN JFETs can be tuned to flow through the source, by using either a mosfet driver with a large gate resistance or an RC-interface driver. These drivers turn on the fin channel during the device avalanche and obviate a large avalanche current into the gate driver. The carrier dynamics within the GaN JFET under the two avalanche paths have been unveiled by physics-based mixed-mode electrothermal simulations. The critical avalanche energy density in both paths was found to be comparable with the state-of-the-art SiC mosfets. Additionally, the RC-interface driver was shown to outperform the mosfet driver for vertical GaN JFETs. The learning about normally off GaN JFETs was applied to a study of commercial normally on SiC JFETs. Two avalanche paths of a similar nature were observed with different gate drivers. This article provides new insights of the JFET avalanche and show the excellent robustness of the novel 1.2 kV vertical GaN JFET.

22 citations

References
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Journal ArticleDOI
TL;DR: This collection of GaN technology developments is not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve.
Abstract: Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

788 citations

Proceedings ArticleDOI
21 Jun 2010
TL;DR: A guideline has been established for the layout and design of high-speed switching circuits based on the results obtained in an experimental parametric study of the parasitic waveform ringing, switching loss, device stress, and electromagnetic interference.
Abstract: This paper presents an experimental parametric study of the parasitic indu waveform ringing, switching loss, device stress, and electromagnetic interference. Based on the results obtained, a guideline has been established for the layout and design of high-speed switching circuits.

205 citations

Journal ArticleDOI
TL;DR: In this paper, the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field effect transistors with double pulse measurements was investigated.
Abstract: We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

164 citations

Journal ArticleDOI
TL;DR: In this article, the authors present self-consistent electrothermal simulations of single-finger and multifinger GaN vertical metal-oxide-semiconductor field effect transistors (MOSFETs) and lateral AlGaN/GaN high-electron-mobility transistors and compare their thermal performance.
Abstract: In this paper, we present self-consistent electrothermal simulations of single-finger and multifinger GaN vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) and lateral AlGaN/GaN high-electron-mobility transistors (HEMTs) and compare their thermal performance. The models are first validated by comparison with experimental dc characteristics, and then used to study the maximum achievable power density of the device without the peak temperature exceeding a safe operation limit of 150°C (P150°C). It is found that the vertical MOSFETs have the potential to achieve a higher P150°C than the lateral HEMTs, especially for higher breakdown voltages and higher scaling level designs.

140 citations

Journal ArticleDOI
TL;DR: The results demonstrate that the analyzed devices do not suffer from dynamic ON-resistance problems, and the impact of hard switching on dynamic becomes weaker at high-temperature levels, as the average energy of hot electrons decreases due to the increase scattering with the lattice.
Abstract: This paper reports on the impact of soft- and hard-switching conditions on the dynamic ON-resistance of AlGaN/GaN high-electron mobility transistors. For this study, we used a special double pulse setup, which controls the overlapping of the drain and gate waveforms (thus inducing soft and hard switching), while measuring the corresponding impact on the ON-resistance, drain current, and electroluminescence (EL). The results demonstrate that the analyzed devices do not suffer from dynamic ${R}_{ {\mathrm{\scriptscriptstyle ON}}}$ increase when they are submitted to soft switching up to ${V}_{{\text {DS}}}= 600$ V. On the contrary, hard-switching conditions lead to a measurable increase in the dynamic ON-resistance (dynamic- ${R}_{ \mathrm{\scriptscriptstyle ON}})$ . The increase in dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ induced by hard switching is ascribed to hot-electrons effects: during each switching event, the electrons in the channel are accelerated by the high electric field and subsequently trapped in the AlGaN/GaN heterostructure or at the surface. This hypothesis is supported by the following results: 1) the increase in ${R}_{ \mathrm{\scriptscriptstyle ON}}$ is correlated with the EL signal measured under hard-switching conditions and 2) the impact of hard switching on dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ becomes weaker at high-temperature levels, as the average energy of hot electrons decreases due to the increase scattering with the lattice.

83 citations