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Journal ArticleDOI: 10.1109/LED.2021.3063360

True Breakdown Voltage and Overvoltage Margin of GaN Power HEMTs in Hard Switching

02 Mar 2021-IEEE Electron Device Letters (IEEE)-Vol. 42, Iss: 4, pp 505-508
Abstract: This work studies the dynamic breakdown voltage (BV) and overvoltage margin of a 650-V-rated commercial GaN power HEMT in hard switching. The dynamic BV measured in the hard switching circuits is over 1.4 kV, being 450 V higher than the static BV measured in the quasi-static I-V sweep. The device can survive at least 1 million hard-switching overvoltage pulses with 1.33 kV peak overvoltage (~95% dynamic BV). Recoverable device parametric shifts are observed after the 1-million pulses, featuring small reductions in threshold voltage and on-resistance. These shifts are different from the ones after the hard-switching pulses without overvoltage and are attributable to the trapping of the holes produced in impact ionization. These results suggest that the BV and overvoltage margin of GaN HEMTs in practical power switching can be significantly underestimated using the static BV.

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Topics: Overvoltage (64%), Breakdown voltage (52%)
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7 results found


Proceedings ArticleDOI: 10.1109/IRPS46558.2021.9405208
Qihao Song1, Ruizhe Zhang1, Joseph P. Kozak1, Jingcun Liu1  +2 moreInstitutions (1)
21 Mar 2021-
Abstract: Surge energy robustness of power devices is highly desired in many power applications such as automotive powertrains and power grids. While Si and SiC power MOSFETs withstand surge energy through avalanching, GaN high-electron-mobility transistors (HEMTs) have no avalanche capability. Recent studies have revealed that the p-gate GaN HEMT withstands surge energy through capacitive charging and fails when the peak capacitive voltage reaches its breakdown voltage (BV). This work, for the first time, studies the surge-energy robustness of a 650-V rated cascode GaN HEMT in the unclamped inductive clamping (UIS) test. The cascode GaN HEMT was found to withstand the surge energy via capacitive charging but accompanied by the Si MOSFET avalanching. Two failure modes were observed, both occurring in the GaN HEMT. The first mode is featured by a short between the HEMT gate and drain (cascode source and drain), while the second mode is featured by a short between the HEMT source and drain. Statistical results of multiple devices tested under different load inductance show that the second failure mode predominates. Additionally, the device failure voltage in mode I is statistically higher than that in mode II. Failure analysis of both modes is presented, and the physical explanations of the two modes and their competitions are proposed. These results provide important new insights into the robustness of cascode GaN HEMTs.

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Topics: Cascode (54%), Overvoltage (53%), Power semiconductor device (52%) ... show more

2 Citations


Proceedings ArticleDOI: 10.1109/APEC42165.2021.9487252
Qihao Song1, Ruizhe Zhang1, Joseph P. Kozak1, Jingcun Liu1  +2 moreInstitutions (1)
14 Jun 2021-
Abstract: Surge energy robustness is essential for power semiconductor devices in many power electronics applications, such as automotive powertrains and electrical grids. Si and SiC MOSFETs can dissipate surge energy via avalanche. However, GaN high-electron-mobility-transistor (HEMT) has no avalanche capability. Recent studies have investigated the surge energy robustness of p-gate GaN HEMTs, revealing a capacitive-charging-based withstanding process. The degradation of p-gate GaN HEMT under repetitive surge energy stresses has also been reported. This work, for the first time, studies the repetitive surge energy robustness of a 650-V rated cascode GaN HEMT in the unclamped inductive switching (UIS) test. The cascode GaN HEMT shows a lower failure boundary under the repetitive UIS stress than the one under the single UIS stress. When the surge energy approaches the repetitive failure boundary, devices do not fail immediately but within limited cycles of stress. Devices were found to survive 1 million UIS cycles when the peak UIS voltage is reduced to ~80% of the failure boundary, but show considerable parametric shifts after the repetitive stress, including an on-resistance (RDS(ON)) increase during both forward and reverse conductions, a reduction in the off-state drain leakage current (I DSS ), and a negative shift of the drain-to-source capacitance (C DS ). These behaviors of device failure and degradation under repetitive UIS stresses can be explained by the buffer trapping accumulation in GaN HEMTs, which may lead to a reduction of the device dynamic breakdown voltage. This physical explanation has also been validated by physics-based TCAD simulation.

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Topics: Overvoltage (53%)

Journal ArticleDOI: 10.1109/LED.2021.3090341
In-jun Hwang1, Soogine Chong1, Dong-Chul Shin1, Sun-Kyu Hwang1  +9 moreInstitutions (1)
Abstract: Wafer level transient voltage measurement (WLTVM) to estimate the short circuit capability of AlGaN/GaN HEMT devices is suggested. Two groups of samples with similar DC and switching properties but different short circuit capabilities of 4-7 and $>{10}\mu \text{s}$ were evaluated. The extracted junction temperature and the measured saturation/linear current under repeated short circuit stresses suggest that the short circuit failure is attributed to the degradation in the drift region. The WLTVM could measure the transient potential change along the drift region during short circuit condition. The sample with lower short-circuit survivability showed a faster propagation of the high field traveling from the gate to the drain. The time the high electric field reaches the drain coincides with the time of the short circuit failure. In addition to providing the insight into the short circuit failure mechanism, wafer-level method can provide a quick and non-destructive evaluation of the short circuit capability before packaging devices.

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Topics: Short circuit (69%), Transient voltage suppressor (53%), Transient (oscillation) (51%) ... show more

Journal ArticleDOI: 10.1109/TED.2021.3109845
Sihao Chen1, Hang Chen1, Yingbin Qiu, Chao Liu1Institutions (1)
Abstract: We report GaN vertical trench MOS barrier Schottky (TMBS) diodes with embedded p-GaN shielding rings (SRs) and systematically investigate the impact of different structural parameters of the p-GaN SRs on the breakdown performance of the GaN-based vertical TMBS diodes by numerical simulation. The charge coupling effect by the embedded p-n junction at the bottom of the trench homogenize the electric field at the trench corner and alleviate the electric field crowding effect at the Schottky contact region, which can effectively avoid the premature breakdown and improve the reverse blocking capability of the TMBS diodes. The p-GaN SRs can also broaden the overlapped depletion region and shift the pinch-off point into the n−-GaN drift region, thus facilitating the 2-D depletion in the n−-GaN drift layer and boosting the breakdown performance of the conventional TMBS diodes. We found that the doping concentration, thickness, and the width of the p-GaN SRs are closely associated with the electric field distribution and the reverse breakdown characteristics of the GaN-based vertical TMBS diodes. The vertical TMBS diodes with optimal p-GaN SR parameters featured a dramatic improvement in the breakdown voltage from 907 to 1281 V, without an obvious degradation in the ON performance. The proposed TMBS diodes with a p-GaN SR structure can pave the way toward a high-performance GaN vertical power device for high-power and high-efficiency power switch applications.

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Topics: Schottky barrier (59%), Depletion region (58%), Schottky diode (58%) ... show more

Open accessJournal ArticleDOI: 10.1063/5.0061555
Koon Hoo Teo1, Yuhao Zhang2, Nadim Chowdhury3, Shaloo Rakheja4  +6 moreInstitutions (5)
Abstract: GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

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Topics: Electronics (54%)

References
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12 results found


Open accessJournal ArticleDOI: 10.1088/1361-6463/AAAF9D
Hiroshi Amano1, Yannick Baines2, Matteo Borga3, T Bouchet2  +61 moreInstitutions (21)
Abstract: Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

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495 Citations


Proceedings ArticleDOI: 10.1109/IPEC.2010.5543851
21 Jun 2010-
Abstract: This paper presents an experimental parametric study of the parasitic indu waveform ringing, switching loss, device stress, and electromagnetic interference. Based on the results obtained, a guideline has been established for the layout and design of high-speed switching circuits.

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Topics: Parasitic element (55%), Waveform (51%), Electromagnetic interference (51%) ... show more

178 Citations


Journal ArticleDOI: 10.1109/TED.2013.2261072
Yuhao Zhang1, Min Sun1, Zhihong Liu1, Daniel Piedra1  +4 moreInstitutions (1)
Abstract: In this paper, we present self-consistent electrothermal simulations of single-finger and multifinger GaN vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) and lateral AlGaN/GaN high-electron-mobility transistors (HEMTs) and compare their thermal performance. The models are first validated by comparison with experimental dc characteristics, and then used to study the maximum achievable power density of the device without the peak temperature exceeding a safe operation limit of 150°C (P150°C). It is found that the vertical MOSFETs have the potential to achieve a higher P150°C than the lateral HEMTs, especially for higher breakdown voltages and higher scaling level designs.

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97 Citations


Journal ArticleDOI: 10.1109/TED.2018.2828702
Abstract: We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

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Topics: Schottky barrier (62%), Threshold voltage (61%)

72 Citations


Journal ArticleDOI: 10.1109/TED.2017.2728785
Abstract: This paper reports on the impact of soft- and hard-switching conditions on the dynamic ON-resistance of AlGaN/GaN high-electron mobility transistors. For this study, we used a special double pulse setup, which controls the overlapping of the drain and gate waveforms (thus inducing soft and hard switching), while measuring the corresponding impact on the ON-resistance, drain current, and electroluminescence (EL). The results demonstrate that the analyzed devices do not suffer from dynamic ${R}_{ {\mathrm{\scriptscriptstyle ON}}}$ increase when they are submitted to soft switching up to ${V}_{{\text {DS}}}= 600$ V. On the contrary, hard-switching conditions lead to a measurable increase in the dynamic ON-resistance (dynamic- ${R}_{ \mathrm{\scriptscriptstyle ON}})$ . The increase in dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ induced by hard switching is ascribed to hot-electrons effects: during each switching event, the electrons in the channel are accelerated by the high electric field and subsequently trapped in the AlGaN/GaN heterostructure or at the surface. This hypothesis is supported by the following results: 1) the increase in ${R}_{ \mathrm{\scriptscriptstyle ON}}$ is correlated with the EL signal measured under hard-switching conditions and 2) the impact of hard switching on dynamic ${R}_{ \mathrm{\scriptscriptstyle ON}}$ becomes weaker at high-temperature levels, as the average energy of hot electrons decreases due to the increase scattering with the lattice.

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51 Citations


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No. of citations received by the Paper in previous years
YearCitations
20222
20215