Ultra low power, harsh environment SOI-CMOS design of temperature sensor based threshold detection and wake-up IC

Method and apparatus for limiting access to an integrated circuit (IC)

Abstract: A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Design of a CMOS readout circuit for wide-temperature range capacitive MEMS sensors

Abstract: We present a capacitance readout interface circuit in bulk CMOS process which is functional at wide temperature range between -55oC to 175oC. The proposed circuit uses a sigma-delta technique to convert capacitance ratio into a digital output and is suitable to provide a high-accuracy digitized output for capacitive MEMS sensors. The circuit is implemented using IBM 0.13μm CMOS technology. Simulation results show that the circuit has excellent stability over wide temperature range, as high as 0.1% accuracy between -55oC to 175oC.

Temperature Sensing Scheme Through Random Telegraph Noise in Contact RRAM

Abstract: A novel contact resistive random access memory (CRRAM) device based a temperature sensor is proposed and investigated in this letter. By establishing the relationship between CRRAM's random telegraph noise (RTN) signal and temperature, a new temperature sensing scheme is demonstrated for the first time. With a simple comparator circuit, a digital output temperature sensor is successfully implemented based on the temperature-dependent RTN signal. The new sensing scheme is very suitable to low-power low-speed sensor modules.

Design of CMOS capacitance to frequency converter for high-temperature MEMS sensors

Abstract: We present a CMOS capacitance to frequency convertor for capacitive MEMS sensors working in high temperature environments. Many MEMS sensors are needed to work at the extended military temperature range from -55 oC to 175oC and require a suitable readout circuitry to detect, process, and transmit the sensor measurement data. The proposed CMOS circuitry uses a current to frequency conversion circuit to convert the sensor capacitance output into a digital output modulated in frequency. Pulse width control is implemented on-chip to control the pulse width of the output digital signal. The circuitry is implemented using IBM 0.13μm CMOS technology. Simulation results show that the circuitry has excellent stability over wide temperature range, good accuracy and high sensing resolution. The novelty in this work lies in the fact that a digital output is achieved without using complex analog to digital converter (ADC).

Temperature Sensor Front End in SOI CMOS Operating up to 250

Abstract: This brief presents a complementary-to-absolute-temperature voltage and a voltage reference based on the threshold voltage Vth extraction principle. The proposed Vth extraction circuit eliminates the nonlinear temperature-dependent mobility and mobility ratio terms, and it achieves a wide operating temperature range from -25 °C to 250 °C. The threshold-voltage temperature coefficient (TC) mismatch between nMOS and pMOS is compensated by selecting different channel lengths. Fabricated in the 1-μm partially depleted silicon-on-insulator CMOS process, the voltage reference achieves a box model TC of 27 parts per million (ppm) (mean) for an operating temperature range of -25 °C-250 °C and 18.7 ppm (mean) for a range of 25 °C-150 °C. Furthermore, the ratiometric output achieves mean temperature inaccuracy within ±1.8% over a temperature of 275 °C.

CMOS Circuit Design, Layout, and Simulation

Abstract: The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

Temperature sensors and voltage references implemented in CMOS technology

Abstract: This paper reviews the concepts, opportunities and limitations of temperature sensors and voltage references realized in CMOS technology. It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages. Furthermore, it is shown that dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise. The effects of mechan- ical stress are a major source of inaccuracy. In CMOS technology, the mechanical-stress effects are small, as compared to those in bipolar technology. It is concluded that, with low-cost CMOS tech- nolog, rather accurate voltage references and temperature sensors can be realized.

A CMOS voltage reference based on weighted difference of gate-source voltages between PMOS and NMOS transistors for low dropout regulators

Abstract: A CMOS voltage reference, which takes advantage of weighted difference of the gate-source voltages between a PMOS and an NMOS transistor operating in saturation region, is presented in this paper. The reference has been implemented in a standard 0.6-µm CMOS process (V thn ≈ |V thp | ≈ 0.9 V@0° C) and gives a temperature coefficient of not greater than 62 ppm/°C from 0 to 100° C without trimming, while consuming a maximum of 9.7 µA with a minimum supply of 1.4 V. The worst-case line regulation is ±0.17 %/V. The occupied chip area is 0.055 mm2. The proposed reference has been applied to a 10-mA CMOS low dropout regulator, and a temperature coefficient of 94 ppm/°C is achieved when the regulator delivers maximum load current.