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Proceedings ArticleDOI

Ultra low power, harsh environment SOI-CMOS design of temperature sensor based threshold detection and wake-up IC

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TLDR
In this article, an ultra-low-power temperature-sensor-based silicon-on-insulator (SOI) CMOS Integrated Circuit (IC) for harsh environment application is presented, which detects a temperature threshold, generates a wake-up signal that turns on a data-acquisition microprocessor once the threshold has been detected and operates as a temperature sensor in a harsh environment while being wired to the microprocessor kept in a safe area.
Abstract
An ultra-low-power temperature-sensor-based silicon-on-insulator (SOI) CMOS Integrated Circuit (IC) for harsh environment application is presented. It first detects a temperature threshold, secondly generates a wake-up signal that turns on a data-acquisition microprocessor once the threshold has been detected and thirdly operates as a temperature sensor in a harsh environment while being wired to the microprocessor kept in a safe area. The IC is continuously on for a very long period of time and is required to be powered from a ultrathin battery type, hence must be an ultra low power design. It includes a diode-based temperature sensor, a quasi-temperature independent voltage generator, a comparator and a power switch to limit the microprocessor stand-by consumption. Since our application is mainly for harsh environment (e.g. high temperature, radiation), the chip has been designed using the 1-µm high-temperature SOI-CMOS XFAB technology; it occupies an area of 560µm×165µm. The biasing current and power dissipation are 4.12 µA and 20.6 µW respectively at a supply voltage of 5V and temperature of 27°C, according to the post-layout transistor level simulation results.

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Citations
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Patent

Method and apparatus for limiting access to an integrated circuit (IC)

TL;DR: In this paper, a method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided, at least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection with low power consumption.
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Design of a CMOS readout circuit for wide-temperature range capacitive MEMS sensors

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Temperature Sensing Scheme Through Random Telegraph Noise in Contact RRAM

TL;DR: In this article, a novel contact resistive random access memory (CRRAM) device based on a temperature sensor is proposed and investigated by establishing the relationship between CRRAM's random telegraph noise (RTN) signal and temperature, a new temperature sensing scheme is demonstrated for the first time.
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Design of CMOS capacitance to frequency converter for high-temperature MEMS sensors

TL;DR: A CMOS capacitance to frequency convertor for capacitive MEMS sensors working in high temperature environments and has excellent stability over wide temperature range, good accuracy and high sensing resolution.
Journal ArticleDOI

Temperature Sensor Front End in SOI CMOS Operating up to 250

TL;DR: The proposed Vth extraction circuit eliminates the nonlinear temperature-dependent mobility and mobility ratio terms, and it achieves a wide operating temperature range from -25 °C to 250 °C, and the ratiometric output achieves mean temperature inaccuracy within ±1.8% over a temperature of 275 °C.
References
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Book

CMOS Circuit Design, Layout, and Simulation

TL;DR: Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.
Journal ArticleDOI

Temperature sensors and voltage references implemented in CMOS technology

TL;DR: It is shown that bipolar substrate transis- tors are very suited to be applied to generate the basic and PTAT voltages and dynamic element matching and auto-calibration can solve the problems related to mismatching of components and noise.
Proceedings Article

A CMOS voltage reference based on weighted difference of gate-source voltages between PMOS and NMOS transistors for low dropout regulators

TL;DR: In this article, a CMOS voltage reference, which takes advantage of weighted difference of the gate-source voltages between a PMOS and an NMOS transistor operating in saturation region, is presented.
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