Proceedings ArticleDOI
Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance
Navab Singh,Fong Yin Lim,W. W. Fang,S. C. Rustagi,L. K. Bera,Ajay Agarwal,C.H. Tung,Keat-Mun Hoe,S. R. Omampuliyur,D. Tripathi,A. O. Adeyeye,Guo-Qiang Lo,N. Balasubramanian,Dim-Lee Kwong +13 more
- pp 1-4
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TLDR
Fully CMOS compatible silicon-nanowire (SiNW) gate-all-around (GAA) n- and p-MOS transistors are fabricated with nanowire channel in different crystal orientations and characterized at various temperatures down to 5K as mentioned in this paper.Abstract:
Fully CMOS compatible silicon-nanowire (SiNW) gate-all-around (GAA) n- and p-MOS transistors are fabricated with nanowire channel in different crystal orientations and characterized at various temperatures down to 5K. SiNW width is controlled in 1 nm steps and varied from 3 to 6 nm. Devices show high drive current (2.4 mA/mum for n-FET, 1.3 mA/mum for p-FET), excellent gate control, and reduced sensitivity to temperature. Strong evidences of carrier confinement are noticed in term of Id-Vg oscillations and shift in threshold voltage with SiNW diameter. Orientation impact has been investigated as wellread more
Citations
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Excimer laser-annealed dopant segregated schottky (ELA-DSS) si nanowire gate-all-around (GAA) pFET
Yoke King Chin,K. L. Pey,Navab Singh,W. J. Lu,Guo-Qiang Lo,L. H. Tan,X. C. Wang,Hongyu Zheng,L. Chan +8 more
TL;DR: In this paper, a pulsed excimer laser annealing (ELA) integrated with dopant segregation method for source/drain junction engineering of gate-all-around (GAA) silicon nanowire P-FETs is reported.
Journal ArticleDOI
The Short Channel and Quantum Confinement Effects on Transfer Characteristics of Si NWMOSFET Depending on the Gate Length and Temperature
I. Genç,Semran İpek +1 more
TL;DR: In this paper , the authors have investigated the quantum ballistic transport properties of Si nanowire MOSFET (Si NWMOSFet) with 4 nm gate length.
Journal Article
Low Frequency Noise Behavior of Independent Gate Junctionless FinFET
TL;DR: In this paper, the authors used low frequency noise analysis to understand and map the current conduction path in a multi-gate junctionless FinFET, which behaves as a gated resistor and shows excellent short channel effect suppression due to its multi gate structure.
A Simple, Accurate Capacitance-Voltage Model of Undoped Silicon Nanowire MOSFETs
TL;DR: In this paper, the authors presented a simple, accurate charge and capacitance model for undoped cylindrical gate-allaround (GAA) silicon-nanowire (SiNW) MOSFETs.
Journal ArticleDOI
Advanced gate-all-around fin-like poly-si tfts with multiple nanowire channels
Shih Wei Tu,Ta Chuan Liao,Wei-Kai Lin,Cheng Chin Liu,Ya-Hsiang Tai,Huang-Chung Cheng,Feng Tso Chien,Chii Wen Chen,Wan Lu Chen +8 more
TL;DR: The gate-all-around (GAA) fin-like poly-Si TFTs with multiple nanowire channels (MNCs) have been fabricated using a simple process to demonstrate high performance electrical characteristics.
References
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Journal ArticleDOI
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices
Navab Singh,Ajay Agarwal,Lakshmi Kanta Bera,Tsung-Yang Liow,R. Yang,S.C. Rustagi,C.H. Tung,Rakesh Kumar,G. Q. Lo,N. Balasubramanian,Dim-Lee Kwong +10 more
TL;DR: In this article, gate-all-around (GAA) n-and p-FETs on a silicon-on-insulator with 5-nm-diameter laterally formed Si nanowire channel were demonstrated.
Journal ArticleDOI
Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's
C.P. Auth,James D. Plummer +1 more
TL;DR: In this paper, a scaling theory for fully-depleted, cylindrical MOSFET's was presented. But the scaling theory was derived from the cylinrical form of Poisson's equation by assuming a parabolic potential in the radial direction.
Journal ArticleDOI
Multiple-gate SOI MOSFETs: device design guidelines
TL;DR: In this paper, the authors describe computer simulations of various SOI MOSFETs with double and triple-gate structures, as well as gate-all-around devices.
Journal ArticleDOI
Integrated nanoscale electronics and optoelectronics: Exploring nanoscale science and technology through semiconductor nanowires*
Yu Huang,Charles M. Lieber +1 more
TL;DR: In this paper, a general approach for the synthesis of a broad range of semiconductor nanowires (NWs) with precisely controlled chemical composition, physical dimension, and electronic, optical properties using a metal cluster-catalyzed vapor-liquid-solid growth mechanism was introduced.