Ultracompact optical buffers on a silicon chip

TLDR: In this paper, the trade-offs between resonantly enhanced group delay, device size, insertion loss and operational bandwidth are analyzed for various delay-line designs, and a large fractional group delay exceeding 10 bits is achieved for bit rates as high as 20 Gbps.

Abstract: On-chip optical buffers based on waveguide delay lines might have significant implications for the development of optical interconnects in computer systems. Silicon-on-insulator (SOI) submicrometre photonic wire waveguides are used, because they can provide strong light confinement at the diffraction limit, allowing dramatic scaling of device size. Here we report on-chip optical delay lines based on such waveguides that consist of up to 100 microring resonators cascaded in either coupled-resonator or all-pass filter (APF) configurations. On-chip group delays exceeding 500 ps are demonstrated in a device with a footprint below 0.09 mm2. The trade-offs between resonantly enhanced group delay, device size, insertion loss and operational bandwidth are analysed for various delay-line designs. A large fractional group delay exceeding 10 bits is achieved for bit rates as high as 20 Gbps. Measurements of system-level metrics as bit error rates for different bit rates demonstrate error-free operation up to 5 Gbps.