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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Journal ArticleDOI
Time-Interleaved Noise-Coupling Delta-Sigma Modulator Using Modified Noise-Shaped Integrating Quantizer
Changsok Han,Nima Maghari +1 more
TL;DR: A modified NSIQ scheme is proposed, which not only allows the use of the NSIQ with an even number of time-interleaving, but also increases the overall noise transfer function (NTF) order.
Journal ArticleDOI
An error-feedback noise-shaping SAR ADC in 90 nm CMOS
TL;DR: In this article, a new structure is proposed to utilize the noise-shaping in a charge redistribution successive approximation register (SAR) analog-to-digital converter (ADC).
Proceedings ArticleDOI
Performance Analysis of First Order Digital Sigma Delta ADC
TL;DR: A digital sigma delta ADC architecture, which can perfectly be integrated in any digital IC with a targeted sampling rate of 20 kS/s with more than 80 dB dynamic range is presented.
Journal ArticleDOI
Cascade delta-sigma modulator with pseudo-differential comparator-based switched-capacitor gain stage
TL;DR: In this article, a low-power, multi-stage delta-sigma modulator with comparator-based switched-capacitor (CBSC) gain stages is presented to alleviate the effects of continued technology scaling on analog and mixed-signal circuits.
Journal ArticleDOI
Delay based noise cancelling sturdy MASH delta-sigma modulator
Changsok Han,Nima Maghari +1 more
TL;DR: In this article, a delay-based noise cancelling structure that cancels the first-stage quantisation error was proposed. But the first stage quantization error was removed from the first loop.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.