Open AccessBook
Understanding Delta-Sigma Data Converters
Reads0
Chats0
TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
More filters
Journal ArticleDOI
A Low-EMI Buck Converter Suitable for Wireless Sensor Networks With Spur-Reduction Techniques
TL;DR: In this article, a buck converter using the third-order delta-sigma modulator (DSM) with its noise-shaping characteristic was proposed to achieve low output noise.
Journal ArticleDOI
A Two-Stage Switched-Capacitor Integrator for High Gain Inverter-Like Architectures
TL;DR: A discrete-time, switched capacitor integrator, based on a two-stage architecture where the first stage converts the input voltage into a charge that is accumulated into the second stage, is presented, optimal for low-voltage inverter-like integrators.
Proceedings ArticleDOI
Comparative Study between Continuous-Time Real and Quadrature Bandpass Delta Sigma Modulator for Multistandard Radio Receiver
TL;DR: In this paper, a continuous-time quadrature bandpass delta sigma modulator is proposed for multistandard radio receiver based on the low-IF receiver architecture, which offers a viable solution for realizing digital, monolithic receivers.
Journal ArticleDOI
A 33-ppm/°C 240-nW 40-nm CMOS Wakeup Timer Based on a Bang-Bang Digital-Intensive Frequency-Locked-Loop for IoT Applications
TL;DR: This paper presents a wakeup timer in 40-nm CMOS for Internet-of-Things (IoT) applications based on a bang-bang Digital-intensive Frequency-Locked Loop (DFLL), which fully exploits the advantages of advanced CMOS processes.
Journal ArticleDOI
Bidirectional Peripheral Nerve Interface With 64 Second-Order Opamp-Less ΔΣ ADCs and Fully Integrated Wireless Power/Data Transmission
Maged ElAnsary,Jianxiong Xu,Jose Sales Filho,Gairik Dutta,Liam Long,Camilo Tejeiro,Aly Shoukry,Chenxi Tang,Enver G. Kilinc,Jaimin Joshi,Parisa Sabetian,Samantha Unger,José Zariffa,Paul B. Yoo,Roman Genov +14 more
TL;DR: In this paper, an active probe and microstimulator SoC for interfacing with peripheral nerves is presented, which performs 64-channel artifact-tolerant neural recording, cuff imbalance compensation by impedance sensing, and neurostimulation for the closed-loop operation.
References
More filters
Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.