Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
TL;DR: This article presents a 28-W class-D amplifier for automotive applications using a high switching frequency and a hybrid multibit-PWM scheme, which results in high linearity over a wide range of output power, as well as low AM-band EMI.
Abstract: This article presents a 28-W class-D amplifier for automotive applications. The combination of a high switching frequency and a hybrid multibit $\Delta \Sigma \text{M}$ -PWM scheme results in high linearity over a wide range of output power, as well as low AM-band EMI. As a result, only a small (150-kHz cutoff frequency), and thus low-cost, LC filter is needed to meet the CISPR-25 EMI average limit (150 kHz–30 MHz) with 10-dB margin. At 28-W output power, the proposed amplifier achieves 91% efficiency while driving a 4- $\Omega $ load from a 14.4-V supply. It attains a peak THD+N of 0.00077% (−102.2 dB) for a 1-kHz input signal.
9 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...Dual-difference comparators [20] were used to implement the quantizer....
[...]
...8 results in high MSA, low OOB quantization noise, and high loop-gain across the entire audio band [20]....
[...]
23 Sep 2011
TL;DR: In this article, a two-step 5-bit quantizer was used to achieve a dynamic range of 75.83 dB, peak SNR was 75.1 dB with 25 MHz bandwidth (OSR = 10) while consuming only 27.5 mW from the 1.8 V supply.
Abstract: A 500 MS/s, wideband 4th order continuous-time delta sigma modulator (CT-ΣΔM) using a two-step 5-bit quantizer, consisting of only 10 comparators, is proposed and presented using 0.18µm CMOS technology. A proposed modulator takes advantage of the high resolution two step quantization technique and an excess loop compensation of more than one cycle to achieve a low-power, high dynamic range with a wide conversion bandwidth. A robust systematic design method is used to determine the loop filter coefficients by considering the non-ideal opamps effects including the finite gain and the presence of multiple internal poles and zeros. The proposed CT-ΣΔM achieves a dynamic range of 75.83 dB, peak SNR of 75.1 dB with 25 MHz bandwidth (OSR = 10) while consuming only 27.5 mW from the 1.8 V supply. The relevant design trade offs have been investigated and presented with simulation results.
9 citations
Journal Article•
TL;DR: This paper evaluates and compares the different possible architec- tures for WiMAX and LTE standards in terms of signal quality and transmitter power efficiency and investigates the interest of these architectures for a multiradio transmitter able to support existing wireless communications standards between 800 MHz and 6 GHz.
Abstract: This paper deals with wireless multi-radio transmitter architectures operating in the frequency band of 800 MHz - 6 GHz. As a consequence of the constant evolution in the communication systems, mobile transmit- ters must be able to operate at different frequency bands and modes according to existing standards specifications. The concept of a unique multiradio architecture is an evo- lution of the multistandard transceiver characterized by a parallelization of circuits for each standard. Multi-radio concept optimizes surface and power consumption. Transmitter architectures using sampling techniques and baseband or PWM coding of signals before their amplification appear as good candidates for multiradio transmitters for several reasons. They allow using high efficiency power amplifiers such as switched-mode PAs. They are highly flexible and easy to integrate because of their digital nature. But when the transmitter efficiency is considered, many elements have to be taken into account: signal coding efficiency, PA efficiency, RF filter. This paper investigates the interest of these architectures for a multiradio transmitter able to support existing wireless communications standards between 800 MHz and 6 GHz. It evaluates and compares the different possible architec- tures for WiMAX and LTE standards in terms of signal quality and transmitter power efficiency.
9 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...This ΣΔ modulator has been synthesized using the Matlab Delta-Sigma Toolbox [19]....
[...]
01 Nov 2016
TL;DR: This paper presents a 4-channel power electronics (PE) controller front-end interface with input signal conditioning and analog-to-digital (A/D) conversion functions for different power electronics system applications.
Abstract: This paper presents a 4-channel power electronics (PE) controller front-end interface with input signal conditioning and analog-to-digital (A/D) conversion functions for different power electronics system applications. The proposed front-end is composed of a 4-channel continuous-time (CT) and discrete-time (DT) hybrid sigma-delta modulator (H-EAM) embedding an input programmable-gain (PGA) in the first CT stage in order to enhance the input dynamic range (DR). The second shared DT stage is designed to utilize multiple-sampling technique with a shared single Op-Amp for low power consumption. This PE controller front-end chip is fabricated with 65 nm CMOS technology. Measurement results show a high dynamic range of 98.3 dB and 84.2 dB SNDR, while achieving a power consumption of 68 μW per channel and a FoMs of 172–179 dB due to the dynamic range boost.
9 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Replacing (2) in (3), the total input-referred noise PSD of the front-end integrator of the CT- M can be approximated by,...
[...]
TL;DR: Behavioral-level simulation results demonstrate the mathematical equivalence of the differential quantizer based error feedback modulator technique with interpolative sigma delta modulators technique and confirms its novelty, theoretical stability, and scalability to higher order.
Abstract: A differential quantizer-based error feedback modulator intended for digitizing analog signals and its comparison to the traditional interpolative sigma delta analog-to-digital conversion is presented in this brief. The differential quantizer-based error feedback modulator also falls under the class of noise-shaping data converters. This newly introduced technique replaces the integrator with a differential quantizer to achieve noise-shaping characteristics. Thus, integrator associated non-idealities, loop-stability issues, and optimization of the integrator scaling coefficients is no more a concern. Differential quantizer-based error feedback modulator technique can perform well in high-precision and low-power applications. Behavioral-level simulation results demonstrate the mathematical equivalence of the differential quantizer based error feedback modulator technique with interpolative sigma delta modulator technique and confirms its novelty, theoretical stability, and scalability to higher order. The circuit level feasibility and effectiveness of the proposed architecture is verified in a 45-nm CMOS process using a 1-V supply with a power consumption of 0.22 and 0.5 mW for the first and second order modulators, respectively.
9 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...The problems due to op-amp saturation and resulting quantizer over-range will also contribute to performance degradation [5], [12]....
[...]
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations