Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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TL;DR: A complementary metal–oxide–semiconductor seawater-salinity-to-digital converter for Internet of Things (IoT) applications in fish farms that has immunity to environmental low-frequency noise and is suitable for IoT applications in salinity-monitoring devices.
Abstract: This paper proposes a complementary metal–oxide–semiconductor (CMOS) seawater-salinity-to-digital converter for Internet of Things (IoT) applications in fish farms. In contrast to previous studies, the proposed converter not only is suitable for processing seawater salinity but also has immunity to environmental low-frequency noise. Another innovation is that it can be easily delivered through transmission media before the IoT. The performance and functions of the proposed converter were successfully verified through measurements. The measured salinity range was 20–80 g/L, and the corresponding measured signal-to-noise-distortion ratio was 81.3–62.5 dB. The proposed converter is, therefore, suitable for IoT applications in salinity-monitoring devices.
9 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...high resolution, such as multiloop cascade, multibit, and highorder single-loop single-bit [23]....
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...Considering the achievable dynamic range (DR) [23] and circuit nonideality, the oversampling ratio (OSR) and loop order n were set at 50 and 3, respectively....
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02 Jun 2019
TL;DR: It is shown that distributing the access points improves the received symbol EVM up to 1.6-dB and increases the coverage of the service area by delivering more uniform received power levels.
Abstract: Distributing the antennas of a base station is a method to increase the coverage and the capacity of a conventional, co-located MIMO communication system. However, physically separated antennas/access points (AP) creates a fundamental challenge of RF phase synchronization required for joint/coordinated transmission in distributed MIMO (D-MIMO) systems. In this paper we compare co-located-and distributed-MIMO wireless communication thru various measurements using a fully synchronized, low-complexity, twelve-channel testbed based on sigma-delta-over-fiber (SDoF). Single and multi-user measurements are performed in a laboratory environment and the error-vector-magnitude (EVM), the received power and signal-to-interference ratio (SIR) is calculated. We show that distributing the access points improves the received symbol EVM up to 1.6-dB and increases the coverage of the service area by delivering more uniform received power levels.
9 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...SDoF employs sigma-delta modulation (SDM) to quantize an information carrying RF-signal to a two-level digital signal by the help of oversampling and noise shaping [14]....
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...The up-converted signals are generated and sigma-delta modulated using MATLAB toolbox [14] and then uploaded to the FPGA....
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03 Sep 2008
TL;DR: A state-of-the-art design of a high speed sigma delta digital to analog converter (DAC) which can be integrated into a system-on-a-chip (SOC) for different communication transceivers effectively and using redundancy coding for speed improvement at register transfer level is introduced.
Abstract: This paper introduces a state-of-the-art design of a high speed sigma delta digital to analog converter (DAC), which can be integrated into a system-on-a-chip (SOC) for different communication transceivers. The operation speed in the digital circuit is very important for accomplishing the performance which can satisfy different communication protocol specifications. This paper therefore addresses this problem by using a parallel structure for radio frequency modulation at system level and by using redundancy coding for speed improvement at register transfer level. Due to the flexibility of the sigma delta structure, the designs can trade off between bandwidth and signal-to-noise ratio (SNR) to adapt to different digital communication protocol specifications. A 4th order structure can e.g. achieve 6.5 MHz single-side bandwidth (SBW) with 99 dB SNR at base band; or it can achieve 26 MHz double-side bandwidth with 73 dB SNR. Moreover, if latches are used, the sampling frequency can reach 1.4 GHz in a 5th order 2bit structure implemented in a 0.13 mum ASIC, which can achieve 29 MHZ SBW with 81 dB SNR. These implementations occupy very little area as demonstrated in the data obtained from synthesis in a 0.13 mum CMOS standard cell library. These sigma delta structures therefore can be integrated in a SOC for different digital communication transceivers effectively.
9 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...4 is the most convenient one among various structures for realizing in the practical digital circuit [10]....
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...The optimization for the higher SNR can be obtained by the placement of the zeros [8-10]....
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01 Dec 2009
TL;DR: This paper first derive lower and upper bounds of the optimal performance, which presents an optimal dynamic quantizer in a closed form, and demonstrates the performance of the proposed quantizer by numerical simulations.
Abstract: This paper addresses a problem of finding an optimal dynamic quantizer for nonlinear control subject to discrete-valued signal constraints. The quantizers to be studied are in the form of a nonlinear difference equation and are evaluated by the performance index expressing the difference between the resulting quantized system and the usual (unquantized) system. To solve the problem, we first derive lower and upper bounds of the optimal performance, which presents an optimal dynamic quantizer in a closed form. The performance of the proposed quantizer is demonstrated by numerical simulations.
9 citations
01 Jan 2011
TL;DR: This work surveys various figures-of-merit (FOM) that have been used to evaluate and compare measured ADC performance, and takes a first step towards a systematic classification and analysis.
Abstract: Abs tra c t—This work surveys various figures-of-merit (FOM) that have been used to evaluate and compare measured ADC performance, and takes a first step towards a systematic classification and analysis. Strengths and weaknesses associated with selected figures-of-merit are discussed, and their potential sweet spots or parametric bias is examined using a combination of theoretical analysis and a near-exhaustive set of scientifically reported experimental data. A commonly used FOM is shown to have a distinct, and highly predictable sweet spot with respect to ENOB, and a strong bias towards scaled manufacturing technologies. It is therefore concluded that a continued discussion and treatment of the topic is motivated.
9 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...DR * BW DR dB +10 log BW P + M Rabii [9] Schreier [10] C1 P A...
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References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations