Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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Dissertation•
22 Feb 2012
TL;DR: In this paper, the authors present an approach for the integration of the modulos de procesamiento in a sistema lock-in and canales analogicos de salida in an FPGA.
Abstract: El contenido de esta tesis abarca el desarrollo y aplicacion de un sistema
multifrecuencia para la exploracion de los limites de concentracion de energia en el
fenomeno de sonoluminiscencia. Como parte del sistema multifrecuencia se incluye el
diseno de una etapa amplificadora de alta tension (V_out =100V_p ) y considerable ancho de
banda ( BW = 400kHz @ C_L = 2nF ) para la excitacion de los actuadores piezoelectricos.
Los algoritmos de procesamiento digital utilizados para el diseno del sistema
multifrecuencia incluyen la tecnica Lock in, filtros recursivos y moduladores Delta-
Sigma. La implementacion eficiente de las arquitecturas concurrentes asociadas a estos
algoritmos se realiza mediante la utilizacion de dispositivos de logica programable,
especificamente tecnologia FPGA (Field Programmable Gate Array). A partir de la
generacion de codigo HDL (Hardware Description Language) re-utilizable se propone
ademas la integracion de los modulos de procesamiento en un sistema lock in
multifrecuencia y multicanal orientado a aplicaciones del tipo ECISTM (Electric Cellsubstrate
Impedance Sensing, Applied BioPhysics) y EBIS (Electrical Bio Impedance
Sensing).
Las arquitecturas desarrolladas para el sistema lock in multicanal resultan escalables en
el numero de etapas lock in (firmware) y numero de canales analogicos de salida
(firmware/hardware). La implementacion de las arquitecturas propuestas muestra que
con la tecnologia de los dispositivos de logica programable disponible actualmente
(tecnologia CMOS de 90nm a 28nm ) es posible la implementacion de decenas de
modulos lock in y canales analogicos de salida en un unico dispositivo FPGA.
Para el estudio del campo acustico en sonoluminiscencia se propone un modelo
analitico del resonador esferico y se realiza una descripcion semi-analitica del sistema
resonador-burbuja. Los modelos propuestos permiten identifican los mecanismos
disipativos que determinan el factor de calidad del sistema resonante. Se analiza ademas
como la emision acustica de la burbuja sonoluminiscente y su interaccion con el
resonador esferico determinan la amplitud y fase relativa de las componentes armonicas
que conforman el campo acustico.
En los ultimos capitulos se presenta el analisis de los resultados obtenidos mediante la
aplicacion del sistema multifrecuencia en los experimentos de sonoluminiscencia
realizados con solucion acuosa de acido sulfurico. Los resultados obtenidos muestran
que la utilizacion de una excitacion bi-armonica constituye un mecanismo que posibilita
atrapar, e incluso estabilizar espacialmente, burbujas sonoluminiscentes en condiciones
de muy bajas concentraciones de gas disuelto en el liquido ( ≈1mbar ). Mediante la
utilizacion de una excitacion bi-armonica y ≈1mbar de xenon disuelto en solucion
acuosa de acido sulfurico al 85% en peso, se obtuvo un limite de ≈ 70kK para la
temperatura maxima del gas contenido en la burbuja sonoluminiscente. Este limite es
impuesto por la inestabilidad posicional causada por la componente de frecuencia
fundamental de la excitacion bi-armonica. Esta conclusion se obtuvo a partir del analisis
de las fuerzas hidrodinamicas que actuan sobre la burbuja. Las fuerzas hidrodinamicas
se calcularon a partir del modelo numerico para la dinamica del radio de la burbuja.
Luego, estas predicciones teoricas fueron validadas con los datos experimentales.
6 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...3, se indica el nivel de ruido correspondiente al error de cuantización obtenido analíticamente como 2 e rms s PSD e f = [4, 5]....
[...]
...Este tipo de conversores funcionan con tasas de muestreo superiores a la tasa de Nyquist (oversampling converters) y permiten alcanzar valores elevados de ENOB (Effective Number Of Bits) [4-6]....
[...]
...No obstante, a la salida de un modulador de orden 2 se obtiene una potencia total de ruido de cuantización superior a la producida por un modulador de primer orden [4], además de una reducción en el rango dinámico de la señal de entrada [4]....
[...]
...Como resultado, en un DAC Delta-Sigma se destruye la relación uno a uno entre las muestras de entrada y la salida del conversor [4]....
[...]
...Los conversores Delta-Sigma son denominados noise-shaping modulators [4, 5] debido a su capacidad de producir una significativa atenuación del ruido de cuantización dentro de la banda de interés....
[...]
Proceedings Article•
01 Sep 2006TL;DR: Using Super Exponential Algorithm (SEA) as the blind equalization technique, the effects of analog imperfections in the analog circuits can be digitally estimated and possibly compensated without any dependance on the types and the sources of the analog imperfection.
Abstract: The analog electronic circuits are always subject to some imperfections. Analog imperfections cause deviations from nominal values of electronic elements. In the case of Linear Time-Invariant (LTI) circuits, the coefficients of the transfer function include some deviations from related typical values leading to the differences between the typical (i.e. design) and the actual transfer functions. In this paper, the analog imperfections are digitally estimated using only the output samples, without any access to the input signal nor to the analog system (blind method). Super Exponential Algorithm (SEA) is used as the blind equalization technique, since it provides rapid convergence. The only assumption is that the input is a non-Gaussian independent and identically distributed (i.i.d.) signal. Using this algorithm, the effects of analog imperfections in the analog circuits can be digitally estimated and possibly compensated without any dependance on the types and the sources of the analog imperfections. It provides the possibility to have an online compensation of the imperfections (realization errors, drifts, etc.). The analog imperfections have been estimated with a precision of ±0.2% and ±1.3% for the exemplary RC and RLC circuits respectively.
6 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...As an example, the high sensitivity to analog imperfections is a major problem in sigma-delta A/D converters [1]....
[...]
11 Apr 2012
TL;DR: A scaled reference improves on power consumption, area, and jitter performance of the first implementation, demonstrating that TD frequency references strongly benefit from CMOS scaling.
Abstract: In recent years, a lot of research has been devoted to the realization of accurate integrated frequency references. A thermal-diffusivity-based (TD) frequency reference provides an alternative method of on-chip frequency generation in standard CMOS technology. A frequency-locked loop locks the output frequency of an oscillator to the accurate phase shift of an electrothermal filter (ETF). This phase shift is a function of the well-defined thermal-diffusivity of silicon, the rate at which heat diffuses through this material, and the ETF's geometry. This thesis investigates the feasibility of TD frequency references. The first 1.6MHz realization in a 0.7?m standard CMOS is accurate to ±0.1% from -55°C to 125°C. By scaling the ETF and using a 0.16?m CMOS, a second reference generates 16MHz at the same level of accuracy. The scaled reference improves on power consumption, area, and jitter performance of the first implementation, demonstrating that TD frequency references strongly benefit from CMOS scaling.
6 citations
09 Nov 2015
TL;DR: This paper presents design methodology and comparison of a 1-bit DAC in both 180 nm and 90 nm CMOS technologies using Cadence Virtuoso tool, which can be used in the feedback path of Delta-Sigma modulators.
Abstract: This paper presents design methodology and comparison of a 1-bit DAC in both 180 nm and 90 nm CMOS technologies. A 1-bit digital-to-analog converter (DAC) is designed and simulated in 180 nm and 90 nm CMOS technologies using Cadence Virtuoso tool. This DAC can be used in the feedback path of Delta-Sigma modulators. Delta-Sigma ADC is the most robust type of ADC which is highly immune to noise compare to that of ordinary analog-to-digital converters. General Terms Digital-to-Analog conversion, Digital, Analog
6 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations