Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
01 Jan 2009
TL;DR: The derived constraints offer a valuable reference for the design of image- reject frequency-translating ΔΣ ADCs that are designed with image-reject (quadrature) mixing and that are implemented using continuous- or discrete-time lowpass or complex-bandpass inner-loop Δ modulators.
Abstract: This brief derives design constraints for bandpass ΔΣ modulators that use mixers to perform frequency downcon- version inside their ΔΣ loop. Such systems, which are referred to as frequency-translating ΔΣ modulators, facilitate direct analog- to-digital conversion (ADC) of high-frequency signals that cannot adequately be processed using classical bandpass ΔΣ modulator architectures. The derived constraints are required for the correct design of frequency-translating ΔΣ modulators: 1) The sampling constraints maintain the stability of the ΔΣ feedback loop and prevent the mixing of the undesired signal content into the input- signal band, thereby ensuring that the time-varying behavior of the mixers does not affect the ADC resolution; and 2) the noise-shaping constraints minimize performance loss during the recombination of the in-phase and quadrature feedback paths. This brief analyzes frequency-translating ΔΣ modulators that are designed with image-reject (quadrature) mixing and that are implemented using continuous- or discrete-time lowpass or complex-bandpass inner-loop ΔΣ modulators. Thus, the derived constraints offer a valuable reference for the design of image- reject frequency-translating ΔΣ ADCs.
4 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...However, the effect of these nonidealities could be evaluated using standard techniques [10]....
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...5(a) follow the expected noise-shaping performance of a fourth-order bandpass ΔΣ modulator [10], after accounting for the translated response of the outer-loop bandpass filter....
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...They are implemented using active-RC or switched-capacitor circuit topologies [10], which facilitate the use of switching mixers....
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TL;DR: The output response obtained by the proposed Interleaved Boost DC- DC suitable for renewable energy applications is very much improved compared to the conventional PWM method of control.
Abstract: Abstract—It is generally accepted that interleaving techniques are efficient at reducing the input/output ripples and increasing the power output of boost converters operating in critical conduction mode.Pulse width modulation (PWM) is used to produce the switching pattern. But this technique causes large switching noise peaks at a multiple number of the carrierfrequency. This paper proposes Interleaved Boost DC- DC suitablefor renewable energy applications. The proposed converterutilizes delta-sigma modulation to control pulse generator. A thorough and effective analysis of the converter is carried out in order to achieve the system stability and to improve the dynamic performance. The output response obtained by this method is very much improved compared to the conventional PWM method of control. Simulation results are provided to illustrate the advantages of the proposed converter and controller scheme. All the advantages of interleaving, such as higher efficiency and reduced ripple for voltage/current, are also achieved in the proposed converter.
4 citations
TL;DR: In this article, a low-complexity, all-digital, time-division-duplex communication architecture is proposed for the uplink, where the received RF signal is quantized into a binary stream through comparison with a tailored reference signal provided by the central unit.
Abstract: Radio-over-fiber is a popular technique to establish communication links between a central location and many remote antenna units. Many different architectures are available for the downlink, i.e., for the communication link from the central unit to the remote antennas. On the contrary, the low-cost and low-complexity requirement of the remote units makes it difficult to devise architectures suitable for the uplink, i.e., for the communication link from the remote antennas to the central unit. In this article, we address this and propose a low-complexity, all-digital, time-division-duplex communication architecture. For the downlink, a band-pass sigma-delta-over-fiber is employed. In the receive mode, the uplink includes an all-digital pulse-width-modulation technique. The received radio frequency (RF) signal is quantized into a binary stream through comparison with a tailored reference signal provided by the central unit. The direct quantization of the RF signal eliminates any need for local-oscillator and mixer stages at the remote units. The performance of the proposed architecture is investigated through extensive simulations and measurements. For instance, the all-digital, time-division duplex communication link provides −30.0 dB and −25.5 dB normalized mean square error signal quality through downlink and uplink communication with 20-MHz, 64-quadrature amplitude modulation signals centered at 2.365-GHz, respectively.
4 citations
01 Dec 2009
TL;DR: A novel DEM technique, dual cycle shift DWA (DCSDWA), is proposed to deal with the tone problem in multi-bit Sigma-Delta Modulators and is suitable for low OSR applications (OSR⩾8) with a good performance.
Abstract: Data weighted averaging (DWA) is the most popular Dynamic Element Matching (DEM) technique to reduce the effects of DAC nonlinearity in multi-bit Sigma-Delta Modulators (MBSDM). However, due to the non-symmetry of the unit-elements in multi-bit DAC, in-band signal-dependent tones always appear when a low oversampling ratio (OSR) is employed in traditional DWA. Therefore, a novel DEM technique, dual cycle shift DWA (DCSDWA), is proposed to deal with the tone problem in this paper. Compared with other modified DWA techniques, DCSDWA is a more effective one with simple implementation. Using the proposed technique in a 4th-order MBSDM with an OSR of 32, the maximum in-band tone is reduced to 6 dB when a random DAC-element mismatching error of 0.5% is assumed. In addition, it results in a better linearity of signal-to-noise distortion ratio (SNDR) versus different input signal and a wider dynamic range (DR). The simulation results prove that the proposed DCSDWA is suitable for low OSR applications (OSR⩾8) with a good performance.
4 citations
01 Jan 2010
TL;DR: In this article, two low-power front-ends that were implemented for capacitive three-axis accelerometers and their operation as a part of an interface were discussed. But the authors focused on background information of the capacitive accelerometer and front-end.
Abstract: This thesis consists of six publications and an overview of the research topic. The overview concentrates on background information of the capacitive accelerometers and front-ends. The publications focus on two low-power front-ends that were implemented for capacitive three-axis accelerometers and their operation as a part of an interface. The switched-capacitor front-ends that were implemented are based on the charge-balancing structures, namely a self-balancing bridge and a ΔΣ front-end, which convert the capacitive acceleration information to analog and digital signals, respectively. Both structures operate mechanically in open-loop configuration and are capable of reducing the effects of the electrostatic forces and displacement-to-capacitance conversion. According to the performance comparison presented in this thesis, both interfaces, which were implemented around the front-ends, exhibit competitive performance when compared to the commercial products of the day.
4 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations