scispace - formally typeset
Search or ask a question
Book•

Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

Content maybe subject to copyright    Report

Citations
More filters
01 Jan 2006
TL;DR: The calibration technique results in improved phase noise performance by adjusting the digital-to-analog converter gain, and thus providing better matching between the phase-locked loop circuitry and digital- to-analogue converter.
Abstract: Delta-sigma fractional-N phase-locked loops are used to generate high quality radio-frequency signals for use in wireless applications. To reduce the phase noise inherent to these systems, a digital-to-analog converter is used to cancel the error introduced by the fractional division process, however matching between the digital-to-analog converter and the phase-locked loop circuitry place a limit on the amount of phase noise reduction that can be achieved. Furthermore, circuit non-linearity results in the appearance of spurious tones in the phase-locked loop output. This dissertation outlines a calibration technique, and a digital quantization technique that provide solutions to these two problems. The calibration technique results in improved phase noise performance by adjusting the digital-to-analog converter gain, and thus providing better matching between the phase-locked loop circuitry and digital-to-analog converter. The digital quantization technique results in no spurious tones when specified non- linearity is applied to the quantizer output sequence and error. The calibration technique was implemented in an integrated circuit, which achieves state-of-the-art performance when compared to currently published phase- locked loops and allows for all circuitry to be integrated onto a single chip. Chapter 1 presents the calibration technique, as well as a theoretical analysis of the stability. Chapter 2 presents details on the digital quantization technique, and a mathematical proof of the absence of spurious tones. In chapter 3, results from an implemented circuit are presented, which verify the behaviour of the technique presented in chapter 1

3 citations

Proceedings Article•DOI•
24 May 2015
TL;DR: The proposed scheme provides an additional first order filtering to CTDSMs, resulting in an increased immunity to out-of-band blockers, and relaxes the design complexity of the preceding filters.
Abstract: This paper presents a methodology to improve filtering in continuous time delta-sigma modulators (CTDSMs). A first order passive low pass filter is incorporated into the delta-sigma loop with a small modification of the existing active RC integrator configuration. The delay associated with the filter is compensated without any additional active components such as opamps. The proposed scheme provides an additional first order filtering to CTDSMs, resulting in an increased immunity to out-of-band blockers. Also, it relaxes the design complexity of the preceding filters. Detailed Cadence and Matlab simulations are provided to prove the operation of the proposed scheme.

3 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Not only they provide high signal-to-noise and distortion ratio (SNDR) (due to noise shaping and oversampling), but also they can provide signal filtering by proper selection of the signal transfer function (STF) [7]....

    [...]

  • ...Pushing the poles of STF towards zeros will lower the poles of NTF as well, resulting in less aggressive noise shaping....

    [...]

  • ...8 shows the simulated |STF | of the CTDSM with and without the LPF....

    [...]

  • ...This is because the STF and NTF share the same poles....

    [...]

Proceedings Article•DOI•
01 Dec 2010
TL;DR: In this paper, an algorithm based on principles of optimal control is presented for designing general m-dimensional ADCs, where the design process involves numerical computation of the candidate value function of the underlying dynamic program, which is computed iteratively in parallel with the quantization law.
Abstract: The paper deals with the task of optimal design of Analog to Digital Converters (ADCs). A general ADC is modeled as a causal, discrete-time dynamical system with outputs taking values in a finite set. Its performance is defined as the worst-case average intensity of the filtered input matching error. The design task can be viewed as that of optimal quantized decision making with the objective of optimizing the performance measure. An algorithm based on principles of optimal control is presented for designing general m-dimensional ADCs. The design process involves numerical computation of the candidate value function of the underlying dynamic program, which is computed iteratively, in parallel with the quantization law. A procedure is presented for certifying the numerical solution and providing an upper bound for performance of the designed ADC. Furthermore, an exact analytical solution to the optimal one-dimensional ADC is presented. It is shown that the designed one-dimensional optimal ADC is identical to the classical Delta-Sigma Modulator (DSM) with uniform quantization spacing.

3 citations

Proceedings Article•DOI•
Jiqin He1, Wenping Ren1, Dongya Shen1, Jie Zeng1, Xiupu Zhang1, Yuan Hong1 •
05 Jun 2016
TL;DR: A novel comprehensive transmitter architecture has been proposed, which enables the concurrent transmission of two separate frequency bands by carrier aggregation, and results achieve high signal-to-noise radio and show the effectiveness of the proposed architecture.
Abstract: In this paper, a novel comprehensive transmitter architecture has been proposed, which enables the concurrent transmission of two separate frequency bands by carrier aggregation. For different frequencies, the proposed transmitter can simultaneously employ 1-bit Low-pass and Band-pass delta-sigma modulators structures, or employ hybrid structures. Carrier frequencies are equal to oversampling frequencies of modulators. Besides, signals on two carriers are not interfered with each other to ensure transmission dual-band signal. Performance analysis is simulated by using Matlab/Simulink. The simulation results achieve high signal-to-noise radio and show the effectiveness of the proposed architecture.

3 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Figure 2 shows a general equivalent structure of DSM with CRFB (a cascade of resonators with distributed feedback) [4]....

    [...]

Dissertation•
01 Nov 2017
TL;DR: This work investigates and defines a set of testing methodology for MEMS accelerometers, making use of a 3D printer based testing platform and a scalable inertial sensor testing board, and results indicate that noise density has little impact on performance after inertial algorithms are applied.
Abstract: Recent development of microelectromechanical systems (MEMS) accelerometers improved their performance. Coupled with their benefits of lower cost and smaller size, enabled their increased utilization in navigation, automotive and consumer devices. However, specification and testing methodologies of these devices are not robustly defined. This work investigates and defines a set of testing methodology for MEMS accelerometers, making use of a 3D printer based testing platform and a scalable inertial sensor testing board. Specification results show that Kionix KXRB5 and Invensense MPU6000 perform the best of the devices tested. Furthermore, commonly used inertial algorithms were applied to study the impact of accelerometer choice in an inertial navigation system (INS). Across a attitude estimation and dead reckoning tests, results indicate that noise density has little impact on performance after inertial algorithms are applied. Cross-axis, bias variability and step motion specification results are better indicators of performance after inertial algorithms are applied. Acknowledgements iii iii Acknowledgements I would like to thank my parents and sister for their continuous support throughout my years in undergraduate and graduate school. Your support and encouragement gave me the motivation to learn new things and pursue my interests. I would like to thank my supervisor, Prof. David A. Johns, for providing guidance and advice throughout the thesis and for all his insights during our weekly discussions throughout the project. I would like to thank you for your approach to the project, giving me a high degree of freedom and expression in this project. Finally, I would also like to thank you for giving me this opportunity to pursue this project, it was a humbling and extremely rewarding experience. I would also like to thank Peter Timmermans and Alon Green for your insight during the early stages of the project which helped shaped different aspects of the project. I learned a lot in regards to the considerations needed for transportation purposes. Finally, I would also like to thank Wahid Rahman, for giving me an outlet to discuss my ideas with.

3 citations

References
More filters
Journal Article•DOI•
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal Article•DOI•
James C. Candy1•
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal Article•DOI•
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book Chapter•DOI•
James C. Candy1, O. Benjamin1•
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal Article•DOI•
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations