Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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01 Nov 2006
TL;DR: A characterization method for verifying stability and measuring the performance quality of arbitrary noise transfer functions for the delta-sigma modulator is presented and it can also be used to automate the design of noiseTransfer functions.
Abstract: A characterization method for verifying stability and measuring the performance quality of arbitrary noise transfer functions for the delta-sigma modulator is presented The method consists of first obtaining the maximum stable input range sweep in the pass-band The variance estimate can then be used to make a sharper upper limit for maximum allowed input range This can then be used to measure the global SNR performance in the pass-band The proposed method enables us to make a comprehensive comparison between arbitrary noise transfer function designs and it can also be used to automate the design of noise transfer functions
49 citations
01 Nov 2016
TL;DR: An opamp-free solution to implement 2nd order noise shaping in a successive approximation register analog-to-digital converter is presented, which has high power efficiency and is realized by charge-redistribution.
Abstract: An opamp-free solution to implement 2nd order noise shaping in a successive approximation register analog-to-digital converter is presented. This 2nd order fully-passive noise shaping, which has high power efficiency, is realized by charge-redistribution. A gain of 2 is required in this proposal which is realized by a passive method to save power. A prototype chip is fabricated in a 65-nm CMOS process occupying a core area of 0.0129 mm2. An ENOB of 10.5-bit is achieved at 64-MHz sampling frequency based on an 8-bit CDAC architecture when the OSR is 4. It dissipates 252.9 sW from a 1.0-V supply and achieves a Walden FoM of 10.9 fJ/conv.-step and a Schreier FoM of 169.9 dB.
48 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Moreover, pattern noise [3] may be generated by 1st order NS....
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Journal Article•
TL;DR: This tutorial explains how performance is assessed and resolves some discrepancies between theoretical and practical results, and discusses the issues of usage, such as limit cycles, idle tones, harmonic distortion, noise modulation, dead zones, and stability.
Abstract: Sigma-delta modulation is the most popular form of analog-to-digital conversion used in audio applica- tions. It is also commonly used in D/A converters, sample-rate converters, and digital power amplifiers. In this tutorial the theory behind the operation of sigma-delta modulation is introduced and explained. We explain how performance is assessed and resolve some discrepancies between theoretical and experi- mental results. We discuss the issues of usage, such as limit cycles, idle tones, harmonic distortion, noise modulation, dead zones, and stability. We characterize the current state of knowledge concerning these issues and look at what are the most significant problems that still need to be resolved. Finally, practical examples are given to illustrate the concepts presented.
48 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Dead zones are familiar to the SDM community and are mentioned in many design textbooks [31]....
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01 Jan 2008
TL;DR: In this article, the design and implementation of a micro-electro-mechanical angular velocity sensor with an open-loop configuration of the secondary resonator is studied. And the use of ΣΔ modulation to improve accuracy in both primary resonator excitation and the compensation of the mechanical quadrature signal is studied, as well as alternative ways to perform the capacitance-to-voltage (C/V) conversion, such as continuous-time front ends either with or without the upconversionof the capacitive signal, various switched-capac
Abstract: In this thesis, issues related to the design and implementation of a micro-electro-mechanicalangular velocity sensor are studied. The work focuses on a system basedon a vibratory microgyroscope which operates in the low-pass mode with a moderateresonance gain and with an open-loop configuration of the secondary (sense) resonator.Both the primary (drive) and the secondary resonators are assumed to have a high qualityfactor. Furthermore, the gyroscope employs electrostatic excitation and capacitivedetection.
The thesis is divided into three parts. The first part provides the background informationnecessary for the other two parts. The basic properties of a vibratory microgyroscope,together with the most fundamental non-idealities, are described, a shortintroduction to various manufacturing technologies is given, and a brief review of publishedmicrogyroscopes and of commercial microgyroscopes is provided.
The second part concentrates on selected aspects of the system-level design of amicro-electro-mechanical angular velocity sensor. In this part, a detailed analysis isprovided of issues related to different non-idealities in the synchronous demodulation,the dynamics of the primary resonator excitation, the compensation of the mechanicalquadrature signal, and the zero-rate output. The use of ΣΔ modulation to improveaccuracy in both primary resonator excitation and the compensation of the mechanicalquadrature signal is studied.
The third part concentrates on the design and implementation of the integratedelectronics required by the angular velocity sensor. The focus is primarily on the designof the sensor readout circuitry, comprising: a continuous-time front-end performingthe capacitance-to-voltage (C/V) conversion, filtering, and signal level normalization;a bandpass ΣΔ analog-to-digital converter, and the required digital signal processing(DSP). The other fundamental circuit blocks, which are a phase-locked loop requiredfor clock generation, a high-voltage digital-to-analog converter for the compensationof the mechanical quadrature signal, the necessary charge pumps for the generationof high voltages, an analog phase shifter, and the digital-to-analog converter used togenerate the primary resonator excitation signals, together with other DSP blocks, areintroduced on a more general level. Additionally, alternative ways to perform the C/Vconversion, such as continuous-time front ends either with or without the upconversionof the capacitive signal, various switched-capacitor front ends, and electromechanicalΣΔ modulation, are studied.
In the experimental work done for the thesis, a prototype of a micro-electro-mechanicalangular velocity sensor is implemented and characterized. The analog partsof the system are implemented with a 0.7-µm high-voltage CMOS (ComplimentaryMetal-Oxide-Semiconductor) technology. The DSP part is realized with a field-programmablegate array (FPGA) chip. The ±100°/s gyroscope achieves 0.042°/s/√Hzspot noise and a signal-to-noise ratio of 51.6 dB over the 40 Hz bandwidth, with a100°/s input…
47 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...If the ADC is a Σ∆-type converter [100], then, with a dc input signal, the input voltage can be revealed with unlimited resolution by integrating it for a long enough time1....
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...1 Downconversion, Decimation, and Phase Correction The oversampled output data from a Σ∆ ADC need to be filtered and decimated in order to reach the final desired accuracy and sampling rate [100]....
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...An electromechanical Σ∆ loop is based on an electronic Σ∆ A/D converter or, as it is sometimes referred to, a Σ∆ modulator [100]....
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TL;DR: This paper presents a design environment for continuous-time sigma-delta analog-to-digital converters for automatic coefficient scaling using a genetic algorithm, allowing to investigate millions of settings in less than a minute.
Abstract: This paper presents a design environment for continuous-time sigma-delta analog-to-digital converters for automatic coefficient scaling using a genetic algorithm. In order to provide an interactive design tool which enables the designer to transform and refine basic performance specifications into the desired, detailed high-level filter description, a short response time is mandatory. Previously published heuristic-search-based design tools have response times in the range of several ten minutes up to hours and are mostly not freely available. In contrast, the design environment presented in this paper provides results in less than a minute due the utilization of a fast simulation method implemented on a graphics card processor. Our hardware supported approach allows performing between 10 k and 67 k simulations and evaluations per second for internal model orders of one to eight, allowing to investigate millions of settings in less than a minute.
47 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations