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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Dissertation
26 Mar 2012
TL;DR: A comparison is conducted between a capacitor-sharing ADC and a regular ADC and as a result, the technique reduces the power consumption in the front-end S/H by 39%.
Abstract: This thesis presents the design and experimental results of a low-power pipeline ADC that applies front-end capacitor-sharing. The ADC operates at 20 MS/s, resolves 1.5 bits/stage, and is implemented in IBM 0.13um technology. The purpose of the technique is to reduce power consumption in the front-end S/H. This work is a proof-of-concept and it concentrates on the front-end design. A comparison is conducted between a capacitor-sharing ADC and a regular ADC and as a result, the technique reduces the power consumption in the front-end S/H by 39%. At an input frequency of 9.53 MHz and a sampling rate of 20 MS/s, the fabricated capacitor-sharing ADC consumes 4.7 mW at 1.2 V, and it achieves an ENOB of 8.5 bits and a FOM of 0.68 pJ/step. It has an ENOB as high as 8.67 bits at 0.4 MS/s and a FOM as low as 0.6 pJ/step when sub-sampling at 20 MS/s.

3 citations


Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...The SNDR/SNR values and spectrum plots are generated using a modified version of the delta-sigma tool box in [18]....

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  • ...MATLAB code, using the delta-sigma toolbox in [18], processes the bits to compute the experimental results....

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  • ...The formula is based on a similar calculation performed on a simple opamp in [18]....

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Proceedings ArticleDOI
15 May 2011
TL;DR: The employed noise suppression method adds small amplitude perturbation to the phase modulator output in order to cancel quantization noise close to the carrier frequency and improves adjacent and the next-adjacent channel leakage power ratios dramatically without any narrowband bandpass filter.
Abstract: Multicarrier modulation schemes such as orthogonal frequency division multiplexing (OFDM) requires linearity for power amplifiers (PAs), which results in low power efficiency operation of PAs. In order to mitigate the issue, envelope pulse-width modulation (EPWM) transmitter has been proposed that employs a A-O modulator to convert envelop of the high PAPR signal into pulse-width modulation (PWM) waveform. However, quantization noise from the A-O modulator is added on the output signal and causes outband spurious radiation. In this paper, the effect of quantization noise suppression for EPWM transmitter with the 2nd-order A-O modulator is revealed. The employed noise suppression method adds small amplitude perturbation to the phase modulator output in order to cancel quantization noise close to the carrier frequency. The cancelation effect can be maximized by using the 2nd-order A-O modulator with a null-response frequency. It improves adjacent and the next-adjacent channel leakage power ratios (ACLR and Next-ACLR) dramatically without any narrowband bandpass filter. The simulated results show that the ACLR and the Next-ACLR are improved by 12 dB and 20 dB, respectively.

3 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Employing the higher order of the Δ-Σ modulator with an order of more than two, the other null-response frequencies can be added [10]....

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Proceedings ArticleDOI
15 Jun 2010
TL;DR: A 24-bit Digital to Analog Converter using the ΣΔ modulation suitable for space applications is presented and can be used either as a stand alone device or embedded into an ASIC as an IP core.
Abstract: In this paper a 24-bit Digital to Analog Converter using the ΣΔ modulation suitable for space applications is presented. This converter operates in the frequency range of 0.1 mHz up to 1kHz It features a current steering output stage consisting of 32 differential current sources. The device includes an I2C protocol which allows the selection of the Oversampling, Ratio of the converter to be either x128 or x256 for a 12 kHz or 6 kHz sampling ratio respectively. This circuit can be used either as a stand alone device or embedded into an ASIC as an IP core.

3 citations


Cites background or methods from "Understanding Delta-Sigma Data Conv..."

  • ...Equation (4) [7] associates the order (L) of the modulator, the resolution (B) the oversampling ratio (OSR) and the desired Signal-to-Noise Ratio....

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  • ...For these reasons Multi-bit modulators are usually preferred [7], [8]....

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  • ...For low orders of modulation, error feedback and error feed-forward structures are preferred while for higher orders, MultistAge-noise-SHaping (MASH) architectures are generally used [7], [8]....

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Proceedings ArticleDOI
03 Apr 2012
TL;DR: The simulation results showed that the amount of noise reduction varied from 0.15 dB to 4.9 dB depending on the input signal, while the effect is not limited by the architecture of delta-sigma modulators.
Abstract: In this paper, we provide the simulation results for the noise reduction in the delta-sigma modulator with a non-uniform quantizer under various types of input signals. The delta-sigma modulator employs a non-uniform quantizer and adjusts the spacing of the quantizer referring to statistical properties of the input signal to the modulator. It reduces its quantization noise compared to the delta-sigma modulator with the uniform quantizer at the same number of output values. The simulation results showed that the amount of noise reduction varied from 0.15 dB to 4.9 dB depending on the input signal, while the effect is not limited by the architecture of delta-sigma modulators. Moreover, it is shown that the PAPR of the input signal cannot work as an indicator of the amount of the noise reduction.

3 citations


Cites background or methods from "Understanding Delta-Sigma Data Conv..."

  • ...One is the third-order CRFB (cascade of resonators with distributed feedback) architecture and the other is the second-order CRFF (cascade of resonators with distributed feed forward) [6]....

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  • ...The coefficients are calculated using the Delta-Sigma Toolbox [6] to be lowpass-type delta-sigma modulators....

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Proceedings ArticleDOI
10 Jun 2007
TL;DR: A compact and low-cost electronic system to record events derived from ligand-gated ion channels embedded in an array of artificial lipid bilayer substrates is presented.
Abstract: Detection of target substances at very low concentration by using molecular stochastic sensing might open new directions for diagnostic tools. This paper presents a compact and low-cost electronic system to record events derived from ligand-gated ion channels embedded in an array of artificial lipid bilayer substrates. In our approach, a Surface Mount Technology electronic system has been designed to be interfaced with a 4x3 array of spots. The currents through each spot of one row are concurrently readout and digitized by three current-mode DeltaSigma (Delta Sigma) analog to digital converters. The output data streams are sent to a digital acquisition card for being recorded and post-processed by a PC.

3 citations

References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations