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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Journal ArticleDOI
Analysis of the Distortion Mechanism in Delta–Sigma Beamforming
TL;DR: The proposed architecture combining a cascaded integrator-comb filter with the insert zero compensation method is shown to have low implementation cost and achieve levels of dynamic range comparable to those of the ideal Delta-Sigma beamformer.
Proceedings ArticleDOI
A 15 bits 12 MS/s 5 th -Order Sigma-Delta modulator for communication applications
TL;DR: A 5th-order single-loop sigma-delta modulator with combination of low distortion and hybrid structures is presented, which uses integrator and IIR filter concurrently and has relatively less feed-forward paths and modulator coefficients.
Proceedings ArticleDOI
Can SMASH Smash MASH
TL;DR: It is shown that the SMASH is least sensitive to the circuit non-idealities among all and its stability is in between the others.
Proceedings ArticleDOI
SPI interface, mux-based synchronizer and DSP unit for a MEMS-based accelerometer
TL;DR: An SPI interface, a mux-based synchronizer and a DSP block designed for a 2-axis accelerometer IC that improves the mean time between failures (MTBF) when multi-bit acceleration data is moved from the domain of an on-chip clock to an SPI master device.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.