Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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01 Jan 2013
TL;DR: This paper explains how performance is improved using genetic algorithm (GA) and makes use of low-distortion swing suppression SDM architecture which is highly suitable for low oversampling ratios to attain high linearity over a wide bandwidth.
Abstract: Sigma-delta modulation is the most popular form of analog-to-digital conversion used in audio applications. The sigma delta conversion technique has been in existence for many years, but recent technological advances now make the devices practical and now area of usage becoming very large. The main thing of these converters is that they are the only low cost conversion method which provides both high dynamic range and flexibility in converting low bandwidth input signals. In this paper we explain how performance is improved using genetic algorithm (GA). In particular, the proposed converter makes use of low-distortion swing suppression SDM architecture which is highly suitable for low oversampling ratios to attain high linearity over a wide bandwidth. GA- based search engine is a stochastic search method which can find the optimum solution within the given constraints.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...The sigma delta conversion technique [1][2][6] has been in existence for many years, but recent technological advances now make the devices practical and their use is becoming widespread....
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01 Jan 2009
TL;DR: In this article, the authors present an untersuchung der Betriebsarten von Verstarkern, which folgt eine unterschauene Unterlage fur effizienzsteigernde verstarkerarchitekturen bilden.
Abstract: Heutige Kommunikationsstandards erfordern Modulationsverfahren, welche die Information sowohl in der Phase als auch in der Amplitude des Tragers modulieren. Die daraus resultierenden Signale weisen hohe Amplitudenschwankungen auf. Die dafur notwendigen linearen Leistungsverstarker zeigen jedoch geringe Effizienzen.
In der vorliegenden Arbeit werden zunachst die Anforderungen an Leistungsverstarker diskutiert und der Einfluss der Modulations- und Zugriffsverfahren untersucht. Anschliesend werden die Anforderungen an den Transistor definiert und die Anforderungen an die Technologie formuliert. Es folgt eine Untersuchung der Betriebsarten von Verstarkern, welche die Grundlage fur effizienzsteigernde Verstarkerarchitekturen bilden. Lineare Verstarker wie Klasse-A-, -AB- und -B-Verstarker zeigen eine hohe Linearitat, die Effizienz fallt aber unterhalb der maximalen Ausgangsleistung schnell ab. Schaltverstarker wie Klasse-D- und -E-Verstarker sind zwar sehr effizient, konnen aber keine amplitudenmodulierten Signale verstarken. Es werden vier Methoden diskutiert, um die Effizienz unterhalb der maximalen Ausgangsleistung zu erhohen: Der Doherty-Verstarker, der Chireix-Verstarker, die Versorgungsspannungsmodulation und der Bandpass-Klasse-S-Verstarker.
Der Doherty-Verstarker bietet eine einfache Moglichkeit, die Effizienz auch unterhalb der maximalen Ausgangsleistung zu erhohen. Das Prinzip beruht auf der Variation der Lastimpedanzen. Zwei Verstarker - ein Hauptverstarker und ein Spitzenverstarker - treiben dabei den gleichen Lastwiderstand. Der Spitzenverstarker wird nur bei hohen Ausgangsleistungen eingeschaltet und verandert das Kompressionsverhalten des Hauptverstarkers. Beim entworfenen Doherty-Verstarker erhoht sich die Effizienz 7 dB unterhalb der maximalen Ausgangsleistung von 15 % auf etwas uber 27 %. Die maximale Ausgangsleistung reduziert sich allerdings von 85 W auf 56 W. Durch eine adaptive Arbeitspunktregelung des Spitzenverstarkers kann die Ausgangsleistung wieder auf 85 W erhoht werden. Die Effizienz steigt dabei nochmals um 5 % auf 32 %.
Der Chireix-Verstarker basiert auf dem Prinzip der linearen Verstarkung durch nichtlineare Komponenten. Das zu verstarkende amplituden- und phasenmodulierte Signal wird durch einen Phasenmodulator in zwei gegenphasige Signale mit konstanter Amplitude aufgeteilt. Diese beiden Signale werden uber hocheffiziente Verstarker verstarkt. Das ursprungliche Signal wird durch Summation der beiden Signale wieder demoduliert. Eine Effizienzsteigerung erfolgt unter Verwendung von nichtisolierenden Summierern. Die Effizienzsteigerung beruht dabei auf der Variation der Lastgeraden. Der aufgebaute Chireix-Verstarker basiert auf dem GaAs-Transistor MRFG35010 von Freescale. Die Einzelverstarker werden im Klasse-B-Betrieb betrieben und haben eine maximale Ausgangsleistung von 5 W bei einer Frequenz von 2 GHz. Die Gesamtleistung ergibt sich damit zu 10 W. Die Effizienz betragt maximal 52 %. Die Effizienz beim Chireix-Verstarker erhoht sich 7 dB unter der maximalen Ausgangsleistung von 25 % auf 32 % und bei 5 dB unter der maximalen Ausgangsleistung von 33 % auf 44 %.
Die Versorgungsspannungsmodulation variiert die Drain- bzw. Kollektorspannung eines Verstarkers in Abhangigkeit der Aussteuerung des Transistors. Es ist das einzige untersuchte Verstarkerkonzept, welches mit allen Verstarkerklassen funktioniert. Es ist auch das einzige Konzept, welches die Bandbreite des HF-Verstarkers nicht einschrankt, solange der erforderliche Spannungsmodulator der Einhullenden des HF-Signals folgen kann.
Die Effizienz berechnet sich aus der Verkettung der Effizienzen des HF-Verstarkers und des Spannungsmodulators. Ein Verstarker auf Basis des GaAs-Transistors MRFG350101 wurde aufgebaut, dessen Versorgungsspannung uber einen Klasse-AD-Verstarker geregelt wird. Die maximale Ausgangsleistung des Verstarkers betragt 6.3 W bei einer Effizienz von 67 %. Die Versorgungsspannung wird im Bereich von 6 V - 12 V geregelt. Die Effizienz 7 dB unter der maximalen Ausgangsleistung steigt dabei von 30 % auf 44 %. Die Bandbreite des Modulators ist dabei groser als 3 MHz.
Bandpass-Klasse-S-Verstarker verwenden Schaltverstarker, um ein analoges Signal hocheffizient zu verstarken. Das analoge Eingangssignal wird uber einen Modulator in eine binare Pulsfolge gewandelt, welche uber einen Schaltverstarker effizient verstarkt wird. Anschliesend wird das verstarkte Signal wieder demoduliert. Bandpass-Delta-Sigma-Modulatoren (BPDSM) stellen ein vielversprechendes Modulationsverfahren dar. Als Schaltverstarker konnen sowohl Klasse-D- Verstarker verwendet werden. Erstmals werden in dieser Arbeit analytische Untersuchungen zur Effizienz von sowohl nichtinvertierten als auch invertierten Klasse-D-Verstarkern bei Ansteuerung mit BPDSM-Signalen durchgefuhrt. Dies erlaubt eine Abschatzung der Effizienz von Bandpass-Klasse-S-Verstarkern unter Verwendung von Klasse-D-Verstarkern.
Today's communication standards require modulation processes which modulate the information in phase as well as in amplitude of the carrier, in order to fulfill bandwidth specifications. The signals show large variations in amplitude that have to be amplified linearly. However, the necessary linear power amplifiers suffer from low efficiencies.
In this thesis, first the requirements for the power amplifiers are discussed, and how they are influenced by modulation processes and access methods. Second, the requirements for the transistors are defined and the requirements for the technology are derived.
An analysis of the operation mode of amplifiers follows, which forms the background for improved efficiency amplifier architectures. Linear amplifiers like class A, AB and B amplifiers show high linearity, but its efficiency decreases in backoff. Though switching amplifiers like class D and E amplifiers are very efficient, they can not amplify amplitude-modulated signals.
In the following chapter, four methods are discussed to increase the efficiency below the maximum output power: The Doherty amplifier, the Chireix amplifier, the envelope modulation and the bandpass class S amplifier.
The Doherty amplifier provides a simple method to improve the efficiency below the maximum output power. The principle is based on the variation of the load impedances. Two amplifiers - one main amplifier and one auxiliary amplifier - drive the same load resistance. The auxiliary amplifier is only switched on at high output power and changes the compression behaviour of the main amplifier. With the designed Doherty amplifier the efficiency 7 dB below the maximum output power improves from 15 % up to almost over 27 %. But the maximum output power is reduced from 85 W to 56 W. Using an adaptive bias control of the auxiliary amplifier, the output power can be increased again to 85 W. Thereby, the efficiency also increases once again by 5 % up to 32 %.
The Chireix amplifier is based on the principle of linear amplification via non-linear components. The amplitude- and phase-modulated signal that has to be amplified is split via a phase-modulator in two opposite phase signals with constant amplitude. These two signals are amplified using a high-efficient amplifier. The original signal is revovered by summation of the two amplified signals. An increase in efficiency takes place when applying non insulating couplers. The increase in efficiency is due to the variation of the load impedance. If saturated class B amplifiers are used, compensation elements at the coupler have to be added, in order to get an increase in efficiency. The behaviour of the efficiency below the maximum output power can be controlled via these elements. If class D amplifiers are used, these compensation elements are not necessary. The efficiency is mainly determined by the charging and discharging of parasitic capacitances.
The envelope modulation varies the drain or collector voltage of an amplifier depending on the envelope of the carrier. This is the only amplifier concept discussed within in this thesis which works with all amplifier classes. It is also the only concept which does not restrict the bandwidth of the RF amplifier, as long as the essential voltage modulator can follow the envelope of the carrier. The efficiency is calculated from the catenation of the efficiencies of the RF amplifier and the voltage modulator. Therefore, the efficiency of the voltage modulator must be as high as possible. An amplifier based on the GaAs transistor MRFG350101 has been built. Its supply voltage is controlled by a class AD amplifier. The maximum output power of the amplifier is 6.3 W with an efficiency of 67 %. The supply voltage is controlled in the range of 6 V to 12 V, as below 6 V, the amplification degrades rapidly. The efficiency 7 dB below the maximum output power increases thereby from 30 % up to 44 %. The bandwidth of the modulator is larger than 3 MHz.
Bandpass class S amplifiers use switching amplifiers, in order to amplify an analogue signal with high efficiency. The analogue input signal is transformed by a modulator into a binary pulse train, which is efficiently amplified using a switching amplifier. Afterwards, the amplified signal is demodulated again. Bandpass Delta Sigma modulators represent a promising modulation method. As switching amplifier, voltage controlled class D amplifiers as well as current controlled class D amplifiers can be used. Due to the irregular switching of the transistors, negative currents occur with the voltage controlled class D amplifier, and negative voltages with the current controlled class D amplifier. These reduce the efficiency of the amplifier, as parasitic elements have to be charged and discharged. For both amplifiers the ouptut power capability is below that of the class B amplifier, so that for the same output power larger transistors have to be used.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Bei Modulatoren mit mindestens zweiter Ordnung kann das Quantisierungsrauschen trotzdem als gleichverteilt angenommen werden [65]....
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TL;DR: It is shown how switched-capacitor-circuit noise and quantization noise, due to the presence of harsh comparators, can be analyzed in a unified frame where the data converter is modeled as a discrete-time system.
Abstract: This paper describes an original simulation-based method to derive the stochastic properties of the output noise of switched-capacitor circuits which are used in sampled-data converters. The method relies on a linear time-varying approximation of the large-signal transient response of the switched circuits. It is shown how switched-capacitor-circuit noise and quantization noise, due to the presence of harsh comparators, can be analyzed in a unified frame where the data converter is modeled as a discrete-time system.
2 citations
CERN1
TL;DR: Most important tests related to noise and effective resolution, nonlinearity, environmental uncertainty, and stability are proved and validated in the specific case of a high-performance ΔΣ ADC.
Abstract: Metrological characterization of high-performance ΔΣ Analog-to-Digital Converters (ADCs) poses severe challenges to reference instrumentation and standard methods. In this paper, most important tests related to noise and effective resolution, nonlinearity, environmental uncertainty, and stability are proved and validated in the specific case of a high-performance ΔΣ ADC. In particular, tests setups are proposed and discussed and the definitions used to assess the performance are clearly stated in order to identify procedures and guidelines for high-resolution ADCs characterization. An experimental case study of the high-performance ΔΣ ADC DS-22 developed at CERN is reported and discussed by presenting effective alternative test setups. Experimental results show that common characterization methods by the IEEE standards 1241 [1] and 1057 [2] cannot be used and alternative strategies turn out to be effective.
2 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...Many electronic measurements systems requiring very-high SNR exploit analog to digital converters (ADCs) based on the ∆Σ (Delta-Sigma) approach [3]....
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12 Jun 2019
TL;DR: This work presents a DEM-free SMASH DSM by employing an inherently linear 3-level DAC in the first stage, which combines the advantages of both the MASH and SMASH structures.
Abstract: Multi-stage noise shaping (MASH) Delta-Sigma modulators (DSMs) can achieve high-order noise shaping with single-bit quantizers, but they require high opamp gain for precise matching between the analog and the digital filters. The Sturdy MASH (SMASH) DSM relaxes the opamp gain requirement but multi-bit digital-to-analog converters (DACs) become necessary. The SMASH structure thus loses the inherent linearity arisen from the 1-bit DACs in the MASH structure, and often employ a dynamic element matching (DEM) scheme, which imposes a speed limit to the modulator. This work presents a DEM-free SMASH DSM by employing an inherently linear 3-level DAC in the first stage, which combines the advantages of both the MASH and SMASH structures. Simulations results are presented, validating the proposed architecture.
2 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...MASH AND SMASH MODULATORS For a dual-loop configuration, the MASH modulator targets to completely remove the quantization noise of the first stage, while the SMASH modulator aims at shaping the noise from both loops with the inherent analog filters [4]....
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References
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TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations