Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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22 May 2016
TL;DR: This technique is based on the naturally sampled PWM emulation scheme and provides sufficient accuracy with minimal computation and can convert a sine wave to a PWM signal and achieve better than −92 dB total harmonic distortion.
Abstract: We describe a technique that digitally converts a pulse-code-modulated (PCM) signal to a pulse-width-modulation (PWM) signal. This technique is based on the naturally sampled PWM emulation scheme. Its computation is simplified by using empirical models. It provides sufficient accuracy with minimal computation. At 384 kHz sampling rate, the proposed technique can convert a sine wave to a PWM signal and achieve better than −92 dB total harmonic distortion (THD) for a sine wave frequency up to 20 kHz and a sine wave amplitude up to 90% of the full range.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...A noise shaper (usually an errorfeedback modulator [2]) reduces the resolution of the 16-bit W [k] signal, yielding the 8-bit P [k] signal....
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Dissertation•
18 Dec 2009TL;DR: The present work is about design of convenient high-order continuous-time band-pass sigma-delta modulators for parallel A/D converters and a new structure based on Weighted feedforward techniques providing an adequate control on the position of the poles of the noise-transfer-function by simple means is proposed.
Abstract: The present work is about design of convenient high-order continuous-time band-pass sigma-delta modulators for parallel A/D converters The extended frequency band decomposition technique is chosen as a good solution for parallelism The requirements of this technique are studied, including high resolution performance of the used converters at high frequencies A 6th-order continuous-time band-pass single-stage sigma-delta modulator with a quantizer number of bits equal to 3 and an oversampling ratio equal to 64 is theoretically able to meet the objectives However, a proper methodology of design is required in order to make a reliable design in practice since continuous-time modulators are sensitive to analog imperfections This methodology must be able to overcome the practical issues such as the dependence of the modulator performance to the modulator central frequency as well as the issue of a robust stability margin For this aim, a new structure based on Weighted feedforward techniques providing an adequate control on the position of the poles of the noise-transfer-function by simple means is proposed Moreover, the proposed structure provides a filtering-signal-transfer-function close to the modulator central frequency in order to increase the input dynamic range of the modulator An optimization method on the modifiable parameters of the proposed topology is developed in order to recover the performance of the modulator accounting analog imperfections The system-level model of analog components extracted from a transistor-level simulation must be used to guarantee the modulator performance in practice The methodology must be associated with a proper resonator capable of providing a large quality-factor at the required band of frequency Of all the studied sorts of the resonators, Lamb-wave-resonators are chosen Also solutions are considered in order to overcome the issues of this kind of resonators including the anti-resonance and low impedance connections Finally, a second-order sigma-delta modulator is chosen to benchmark the proposed solutions AMS Bi-CMOS 035 um technology kit is used and the modulator is designed and simulated in layout-level The results approve the efficiency of the proposed solutions
2 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...Although this precision is out of reach regardless of the employed technology, DAC linearity is achievable by Dynamic Element Matching (DEM) algorithms [143], [144], [145], [146], [147]....
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22 May 2016
TL;DR: The architecture provides an energy-efficient ADC solution for a wide range of sample rates and resolution and is the first example of a noise-shaped ADC with more than two interleaved channels.
Abstract: A novel technique for implementing noise-shaping in time-interleaved SAR ADCs is presented. The noise-shaping is implemented passively and is easily reconfigured from first to second order. In both cases it achieves better SNR improvement than a conventional loop filter for a range of low OSR, and without the need for a power-hungry integrator. The architecture provides an energy-efficient ADC solution for a wide range of sample rates and resolution. To the best of the authors' knowledge, it is the first example of a noise-shaped ADC with more than two interleaved channels.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Although there exist some “Devil’s patterns” of alternating +2 · VLSB and −2 · VLSB inputs for which the second stage can become unstable, these cases are extremely improbable and extensive simulation verifies the stability of the converter [7]....
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20 Mar 2016
TL;DR: In this paper, the authors demonstrate wavelength locking of a silicon ring modulator across 480pm laser wavelength drift using a drop-port OMA monitoring CMOS circuit and a dithering-based feedback loop at a settling speed of up to 380pm/s.
Abstract: We demonstrate wavelength locking of a silicon ring modulator across 480pm laser wavelength drift using a drop-port OMA monitoring CMOS circuit and a dithering-based feedback loop at a settling speed of up to 380pm/s.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Therefore, the system can be analyzed as a delta-modulator but with adaptive feedback steps wherein the average value of λe is minimized by the high loop gain at the low frequency provided by the up-down counter [6]....
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30 Jan 2014
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...From (2-5) it can be observed that the STF is just a delay and the NTF is equivalent to a high-pass filter [25]....
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...Shaping the quantization noise outside the band of interest with DSM can improve further the SNDR of the quantizer [17][25]....
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...However, maintaining the stability in higher order DSMs is critical [25]....
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...DSM employs oversampling in order to distribute the quantization noise evenly over larger frequency band and therefore achieve smaller in-band noise [17][25]....
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References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations