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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings ArticleDOI
16 Aug 2010
TL;DR: A new method for scaling the output swing of the integrators in a sigma-delta modulator is proposed, which takes in consideration the relative effect on the output signal-to-noise ratio of the thermal noise from each integrator to find a set of coefficients which implements the desired transfer functions while reducing the signal swing at each node.
Abstract: This article proposes a new method for scaling the output swing of the integrators in a sigma-delta modulator. The algorithm takes in consideration the relative effect on the output signal-to-noise ratio of the thermal noise from each integrator to find a set of coefficients which implements the desired transfer functions while reducing the signal swing at each node. Simulation results show that the last two integrators output swing can be reduced by 50% and 90% respectively for a 0.5 dB signal-to-noise ratio reduction.

2 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...1 represents a standard fourth order CRFB structure [1]....

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  • ...Therefore, these coefficients can be optimized to implement the desired NTF and STF, based on one or several criteria such as the voltage swing at the output of each integrator [1], power consumption [2], SNR [3,4], etc....

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DissertationDOI
29 Oct 2019
TL;DR: In this article, unterschiedliche Verfahren zur Delta-Sigma-Analog-zu-Digital Umsetzer (ADU) evaluiert.
Abstract: In modernen Anwendungen werden uberabtastende Analog-zu-Digital Umsetzer eingesetzt. Eine besondere Klasse sind die Delta-Sigma-Analog-zu-Digital Umsetzer (ADU). Sie werden bei sehr hohen Abtastfrequenzen betrieben, in der Regel bei dem 64- bis 1024-fachen der Signalfrequenz, dafur besitzen sie eine sehr geringe Quantisierung, bis zu einem Bit. Mit entsprechenden digitalen Filtern lassen sich mit dem Verfahren Wortbreiten von 12 bis 16 Bit erreichen. Allerdings begrenzt dabei das Filter die erzielbare Kleinsignalbandbreite. Mit der weiterentwickelten und vorgestellten ΔΣ Signalverarbeitung (ΔΣSV) kann auf die Filterung verzichtet werden. In dieser Arbeit werden unterschiedliche Verfahren zur ΔΣSV evaluiert. Das Ergebnis stellen sowohl Klassen fur lineare, als auch eine Klasse fur nichtlineare Operationen dar, die eine gute Abbildungsqualitat besitzen und alle Funktionen aus der jeweiligen Klasse abbilden konnen. Basierend auf diesen Operationen wird die Strom- und Spannungsregelung einer dreiphasigen Last vorgestellt. Zur Umsetzung der hochfrequenten Bitstrome in leistungshalbleitertaugliche Schaltfrequenzen wird ein hysteresebasierter Modulator, der echte Raumzeigermodulation mit beiden Nullvektoren beherrscht, eingesetzt. Fur diesen wird ein Schaltfrequenzregler vorgestellt und unterschiedliche Stromregler erprobt. Abschliesend wird eine drehgeberlose Geschwindigkeitsregelung in ΔΣSV vorgestellt.

2 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Während ein ∆Σ-M erster Ordnung immer stabil ist, müssen die Rückkopplungskoe zienten bei ∆Σ-M höherer Ordnung zu den einzelnen Stufen für Stabilität ausgelegt werden [34]....

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  • ...Durch die Quantisierung mit zwei Zuständen wird dem Nutzsignal bei jeder Abtastung ein energiereiches Fehlersignal hinzugefügt [34]....

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  • ...Ein anderer Ansatz ist, unterschiedliche Parameter bei den ∆Σ-M zu 48 3 Delta-Sigma Signal Verarbeitung verwenden [HKS16], zum Beispiel [34] und [25]....

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  • ...Dieses Verhalten ist zu erwarten, da ∆Σ-M zweiter Ordnung für Stabilität ein Parameter Design erfordern und einheitliche Rückführungen nicht zu der Klasse der stabilen Auslegungen gehören [25, 34]....

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  • ...Zum Beispiel wird die in Quantendekodierung implementierte Operation Addition in Abb....

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Proceedings Article
25 Mar 2014
TL;DR: It is demonstrated that a new coding scheme shortens the run length from 38 bits to less than 7 bits even if the 1-bit DRF transmitter outputs an LTE signal with 5MHz bandwidth in the carrier frequency from 0.5 GHz to 2 GHz.
Abstract: We propose a novel channel coding scheme for 1-bit digital radio frequency (DRF) transmitter comprising a 1-bit band-pass delta-sigma modulator (BP-DSM). This 1-bit DRF transmitter outputs radio signals generated only by a digital circuit instead of an analog circuit. In addition, the 1-bit DRF transmitter can handle arbitrary modulated waveform as the 1-bit digital pulse train, thereby making it easy to transmit RF signal on a digital optical link whenever using DRF signal as the binary data. However, the optical link usually does not send data, having long run length, and has to use a channel coding such as 8B10B, 64B66B and Manchester coding, which needs additional data and causes DRF power spectrum change. To this end, we proposed a novel channel coding scheme able to control the run length without any additional data while converting the RF signal to a 1 bit digital train. We demonstrated that a new coding scheme shortens the run length from 38 bits to less than 7 bits even if the 1-bit DRF transmitter outputs an LTE signal with 5MHz bandwidth in the carrier frequency from 0.5 GHz to 2 GHz.

2 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...2 has the same relations as shown in (1) and (2)....

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  • ...In addition, this mode can simplify a signal transfer function (STF) to filter an input signal U(z) and output a signal V(z) as shown in (1), where E(z) indicates a quantization noise....

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Proceedings ArticleDOI
03 May 2015
TL;DR: This paper presents an implementation of an all-digital transmitter architecture for software defined radio (SDR) applications that uses a first order, sigma-delta modulator for one-bit quantization and noise shaping, at an additional expense of the high speed components required to perform oversampling and multiplexing.
Abstract: This paper presents an implementation of an alldigital transmitter architecture for software defined radio (SDR) applications. This transmitter uses a first order, sigma-delta modulator for one-bit quantization and noise shaping. The binary signal is passed through high-speed multiplexing circuits for frequency upconvertion directly from base-band to the desired carrier frequency [1]. This digital implementation has interesting features such as reconfigurability as well as preserving a good signal quality, at an additional expense of the high speed components required to perform oversampling and multiplexing. The behavior of the all-digital transmitter is simulated and measured using a baseband signal having 1.94 MHz bandwidth up-converted to 2.5 GHz carrier frequency. The implementation steps are shown along with the obtained simulation and measurement results. The overall linearity performance are given in terms of gain response, signal-to-noise-and-distortion ratio (SNDR) and the adjacent-channel-power ratio (ACPR).

2 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...The OSR ratio is equal to the sampling frequency over the input signal bandwidth [5]....

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  • ...Each of the modulators is first-order sigma-delta modulator having a subtraction block followed by an integrator and a sample-and-hold one-bit quantizer in the forward loop, and an ADC in the feedback-loop [5]....

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Proceedings ArticleDOI
23 Jul 2014
TL;DR: A digital hardware implementation of Radial Basis Function Neural Network (RBFNN) based on sigma-delta modulated bit-streams is presented, and a nonlinear function approximation problem can be solved by the neural networks presented.
Abstract: A digital hardware implementation of Radial Basis Function Neural Network (RBFNN) based on sigma-delta modulated bit-streams is presented. Through the change of feedback coefficient in the framework of traditional sigma-delta modulator, a new limiting amplifier modulator (LAM) is fabricated, and the approximation to Gauss kernel function can be achieved by the combination of several LAMs with different coefficients. The bit-stream neurons with Gauss kernel function and a whole feed-forward artificial neural network is implemented on field programmable gate array (FPGA). Thus a nonlinear function approximation problem can be solved by the neural networks presented.

2 citations

References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations