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Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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TL;DR: A third-order, four-bit feedback, single-loop CT delta-sigma converter with digital background calibration circuit with maximum simulated signal-to-noise and distortion ratio is 67.1 dB within 9 MHz bandwidth.
Abstract: This work presents a digital calibration technique in continuous-time (CT) delta-sigma ($$\Delta \Sigma$$ΔΣ) analog to digital converter. The converter is clocked at 144 MHz with a low oversampling ratio (OSR) of only 8. Dynamic element matching is not efficient to linearize the digital to analog converter (DAC) when the OSR is very low. Therefore, non-idealities in the outermost multi-bit feedback DAC are measured and then removed in the background by a digital circuit. A third-order, four-bit feedback, single-loop CT $$\Delta \Sigma$$ΔΣ converter with digital background calibration circuit has been designed, simulated and implemented in 65 nm CMOS process. The maximum simulated signal-to-noise and distortion ratio is 67.1 dB within 9 MHz bandwidth.
2 citations
TL;DR: A strategy is proposed to re-use the very optimization framework to minimize the effects of coefficient quantization in digitalinline-formula.
Abstract: Strategies for the adaptation of $\Delta \!\Sigma $ modulators ( $\Delta \!\Sigma $ Ms) to the embedding environment with respect to the ability of the latter to remove quantization noise have recently been introduced. They rely on formal optimization techniques to deliver finely tuned values for the coefficients of the $\Delta \!\Sigma \text{M}$ internal filters. However, in digital $\Delta \!\Sigma $ Ms, coefficients will necessarily be quantized to short wordlengths, the shorter the better, cost-wise. Unfortunately, this can severely hinder optimality. In this brief, a strategy is proposed to re-use the very optimization framework to minimize the effects of coefficient quantization. The technique is discussed by a practical design example based on a $\Delta \!\Sigma \text{M}$ for a wideband fractional- ${N}$ phase locked loop (PLL).
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...The classical model of quantization [10] lets one assume that (nT) is white and independent from the modulator input x(nT), providing an approximated linear modulator model....
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...for NTFs based on Chebyshev prototypes [10]....
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...Because the first coefficient of NTF(z) is one (see Section II and [10], [14]), one has EFB(z) = b1z−1 + b2z−2 + · · · + bPz−P....
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...Possible goals in the design of Ms are to devise the noise shaping to either: (i) minimize implementation costs; or (ii) maximize the removability of quantization noise [10], [11]....
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TL;DR: The proposed structure for high-resolution, low-power and wideband discrete time multi-stage (DT-MASH) sigma-delta (ΣΔ) modulators uses multi-bit digital input feed forward path (DFF) and noise coupling (NC) techniques and improves the signal-to-noise and distortion ratio (SNDR) by 28 dB.
Abstract: This paper presents a new structure for high-resolution, low-power and wideband discrete time multi-stage (DT-MASH) sigma-delta (ΣΔ) modulators. It uses multi-bit digital input feed forward path (DFF) and noise coupling (NC) techniques. With the DFF technique, the modulator does not need a power-consuming analog adder at the quantizer input, and the number of comparators of the quantizer will be reduced significantly. Also, because of the reduced swing of the modulator’s integrators, low power integrators can be used. Using a second-order NC technique with no extra active block, the order of the modulator, which uses some paths between analog stages, is increased, and its performance is improved with zero-optimization of the modulator’s noise transfer function (NTF). Behavioral simulations and extensive mathematical analyses confirm the effectiveness of the proposed structure. The effect of the non-idealities in the DFF and NC paths were considered in the behavioral simulations. To examine its performance, a MASH 2–1 modulator was designed in the circuit level with a 180-nm CMOS technology and 1.8 V power supply. The integrators use a new op-amp switching technique to reduce total power consumption. With an over-sampling ratio (OSR) of 8 for the 10 MHz signal bandwidth, the proposed structure improves the signal-to-noise and distortion ratio (SNDR) by 28 dB compared with a conventional MASH 2–1 structure at approximately the same power consumption and very low complexity.
2 citations
21 Dec 2015
TL;DR: In this paper, a dynamic three-phase multi-coils-motor matching (DTMM) technique was proposed that shuffles the whole driving elements in a motor to reduce torque ripple.
Abstract: Improving a torque ripple is one of the major challenges in the field of motors. There are several causes of a torque ripple. This paper focuses on an element value variation of a stator coil caused by a manufacturing defect. Based on a noise shaping dynamic element matching (NSDEM) technique to reduce the influence of variations by shuffling driving elements, a dynamic three-phase multi-coils-motor matching (DTMM) technique was proposed that shuffles the whole driving elements in a motor to reduce torque ripple. The results show that the proposed system reduces the torque ripple by 10% compared to the conventional driving technology.
2 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Digitally direct driven technology The digitally direct driven technology is a system that combines a ΔΣ modulator [4] and noise shaping dynamic element matching (NSDEM) [5] shown in Fig....
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28 Apr 2009
TL;DR: A third-order continuous-time delta-sigma comprised of Active-RC integrator and Gm-C integrator is presented, which achieves NTF zero optimization and chooses nonreturn-to-zero (NRZ) pulse shaping as the DAC type to reduce the clock jitter sensitivity.
Abstract: A third-order continuous-time delta-sigma comprised of Active-RC integrator and Gm-C integrator is presented. For the consideration of power, linearity and performance, the first integrator uses active-RC OpAmp and the others use Gm-C. To reduce the clock jitter sensitivity, we choose nonreturn-to-zero (NRZ) pulse shaping as our DAC type. For the realization of NTF zero optimization, we use resistors to reduce power consumption. The delta-sigma modulator is implemented in standard digital 0.18-µm CMOS process which achieves a 60-dB SNDR or 10-bits ENOB over a 1-MHz signal bandwidth at an OSR of 50. The power consumption of the continuous-time delta-sigma modulator itself is 13.7 mW from the 1.8-V supply.
2 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations