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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Dissertation
16 Aug 2011
TL;DR: In this article, a hybrid operational amplifier compensation technique using Miller and multipath compensation is presented for multi-stage amplifier designs, which is stable over process, temperature, and voltage variations.
Abstract: A hybrid operational amplifier compensation technique using Miller and multipath compensation is presented for multi-stage amplifier designs. Unconditional stability is achieved by the means of pole-zero cancellation where left-half zeros cancel out the nondominant poles of the operational amplifier. The compensation technique is stable over process, temperature, and voltage variations. Compared to conventional Miller-compensation, the proposed compensation technique exhibits improved settling response for operational amplifiers with the same gain, bandwidth, power, and area. For the same settling time, the proposed compensation technique will require less area and consume less power than conventional Miller-compensation. Furthermore, the proposed technique exhibits improved output slew rate and lower noise over the conventional Miller-compensation technique. Two-stage operational amplifiers were designed in a 0.18 μm CMOS process using the proposed technique and conventional Miller-compensated technique. The design procedure for the two-stage amplifier is applicable for higher-order amplifier designs. The amplifiers were incorporated into a switched-capacitor oscillator where the oscillation harmonics are dependent on the settling behaviour of the op amps. The superior settling response of the proposed compensation technique results in a improved output waveform from the oscillator.

1 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...In the above equation, the first factor of two accounts for thermal noise in differential circuits and the second factor of two accounts for the fact that sampling noise and hold noise are distinct and uncorrelated [50, 51]....

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Proceedings ArticleDOI
23 Apr 2013
TL;DR: This paper presents an energy-efficient capacitive sensor interface based on a multi-slope analog-to-digital converter (ADC) that utilizes precision resistor and time as references to achieve a resolution of 14.5 bits for 250 Hz signal bandwidth.
Abstract: This paper presents an energy-efficient capacitive sensor interface based on a multi-slope analog-to-digital converter (ADC). The interface utilizes precision resistor and time as references. By using a multi-slope analog-to-digital converter, the conversion time of this multi-slope modulator is reduced down to 50us. The counter works as a sinc filter to reduce the noise, which helps to achieve a resolution of 14.5 bits for 250 Hz signal bandwidth.

1 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Except for counting, the counter also works as a sinc filter with transfer function [3]: , (6)...

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DOI
01 Jan 2013
TL;DR: The final author version and the galley proof are versions of the publication after peer review and the final published version features the final layout of the paper including the volume, issue and page numbers.
Abstract: • A submitted manuscript is the author's version of the article upon submission and before peer-review. There can be important differences between the submitted version and the official published version of record. People interested in the research are advised to contact the author for the final version of the publication, or visit the DOI to the publisher's website. • The final author version and the galley proof are versions of the publication after peer review. • The final published version features the final layout of the paper including the volume, issue and page numbers.

1 citations


Cites background or methods from "Understanding Delta-Sigma Data Conv..."

  • ...In this case, a different FoM is used, defined as [23]:...

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  • ...Note that this criterion is neither necessary (some stable high-order modulators are reported for which higher values are allowed), nor sufficient (this criterion says nothing about a limit on the input signal) [23]....

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Proceedings ArticleDOI
01 Nov 2008
TL;DR: Simulated results demonstrate the feasibility of a second order FDSM converter, and shows that 16 times increase in power compared to a first order F DSM converter is tolerated, while still maintaining the figure-of-merit.
Abstract: In this paper we report on implementation considerations for second order FDSM analog-to-digital converters to be used in wireless sensor network nodes. A comprehensive Verilog-A simulation model is presented along with a new control logic. The allowed increase in power compared to first order converters is presented. Simulated results demonstrate the feasibility of a second order FDSM converter, and shows that 16 times increase in power compared to a first order FDSM converter is tolerated, while still maintaining the figure-of-merit.

1 citations


Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...The power spectral density (PSD) seen in these plots are produced using the method in [12] with the first 215 samples from each output....

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Dissertation
01 Jan 2012

1 citations


Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Loop stability is however a consideration in single loop higher-order system [7]....

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References
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Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations