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Understanding Delta-Sigma Data Converters
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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.Abstract:
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.read more
Citations
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Proceedings ArticleDOI
78 dB SNR multibit continuous-time delta-sigma ADC for readout of CdZnTe detector arrays
Haiyan Zhou,Matthias Voelker +1 more
TL;DR: A 78 dB SNR multibit continuous-time delta-sigma ADC dedicated to the readout of CdZnTe detector arrays at the bandwidth of 625 kHz offers the possibility to move most signal processing steps like pulse shaping, energy detection and timing analysis into the digital domain.
Influence of the envelope coding on a class E amplifier efficiency in polar architectures
TL;DR: In this paper, the effect of the envelope binary distribution after coding on the efficiency of a class E power amplifier was analyzed for a mobile WiMAX signal when it was coded with a Pulse Width Modulator in EER architecture and with a low pass Sigma-Delta modulator in a polar architecture.
Proceedings ArticleDOI
Error Estimates in Second-Order Continuous-Time Sigma-Delta Modulators
TL;DR: In this paper, the authors present a general framework to study the error between the filtered output and the input for continuous-time Sigma-Delta (CT-ΔΣ) modulators, under regularity assumptions on the input and the filtering kernel.
Proceedings ArticleDOI
On the multistage design of optimal-NTF ΔΣ modulators — The case of fractional synthesizers
TL;DR: Although stability cannot be guaranteed as in conventional MASH designs, splitting the modulator in stages can still provide advantages and an empirical invariant on the overall number of output levels required for stable operation is identified.
References
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Journal ArticleDOI
A higher order topology for interpolative modulators for oversampling A/D converters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI
Decimation for Sigma Delta Modulation
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI
An analysis of nonlinear behavior in delta - sigma modulators
Sasan H. Ardalan,J.J. Paulos +1 more
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI
The Structure of Quantization Noise from Sigma-Delta Modulation
James C. Candy,O. Benjamin +1 more
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI
A fourth-order bandpass sigma-delta modulator
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.