Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
01 Jan 2012
TL;DR: An overview is given of the different ADCs, in which power consumption has been minimized, and the noise shaping is carried out with Switched-capacitor, and with opamp/GmC filters.
Abstract: An overview is given of the different ADCs, in which power consumption has been minimized. First flash ADCs are examined, in which interpolation and folding is used to reduce the number of comparators. Then pipeline and SAR ADCs are shortly reviewed. Oversampling ADCs are discussed in more detail. The noise shaping is carried out with Switched-capacitor, and with opamp/GmC filters. The text concludes with TDC based ADCs.
1 citations
TL;DR: This method amplifies the output signal variation of a capacitance-to-digital (CDC) chip by designing a series resonant circuit and is adaptable to a majority of existing C-type sensors.
Abstract: This article proposes a method for improving the resolution of a capacitive-type (C-type) torque sensor. This method amplifies the output signal variation of a capacitance-to-digital (CDC) chip by designing a series-resonant circuit. This study considers the data sampling method of the CDC chip and the effects of the resonant circuit on the output signal. The CDC chip employs a switched-capacitor (SC) integrator for data sampling. The SC integrator was simulated to estimate the amplification of the output signal by the resonant circuit. The inductance and resistance of the resonant circuit are designed to optimize the sensor performance. As the SC integrator is commonly used in CDC chips, the proposed method is adaptable to a majority of existing C-type sensors. When fabricating the sensor, it is important to obtain the designed capacitance for implementing the resonant circuit. We design printed circuit board structures that can accurately obtain the designed gap between sensor electrodes and the ground. Artificial neural network is used for sensor calibration process. To prove the effectiveness of these methods, the performance of a sensor equipped with the resonant circuit was compared to that of a previously developed sensor.
1 citations
TL;DR: A configurable CMOS biochip for measuring low concentrations of bio-analytes by leveraging these advantageous features of NG micro-sensors by developing a design methodology using the physical models of transistors that allows the operating region of the modulator to be switched on-demand between weak and strong inversion.
Abstract: Electrochemical micro-sensors made of nano-graphitic (NG) carbon materials could offer high sensitivity and support voltammetry measurements at vastly different temporal resolutions. Here, we implement a configurable CMOS biochip for measuring low concentrations of bio-analytes by leveraging these advantageous features of NG micro-sensors. In particular, the core of the biochip is a discrete-time $\Delta \Sigma$ modulator, which can be configured for optimal power consumption according to the temporal resolution requirements of the sensing experiments while providing a required precision of $\approx$ 13 effective number of bits. We achieve this new functionality by developing a design methodology using the physical models of transistors, which allows the operating region of the modulator to be switched on-demand between weak and strong inversion. We show the application of this configurable biochip through in-vitro measurements of dopamine with concentrations as low as 50 nM and 200 nM at temporal resolutions of 100 ms and 10 s, respectively.
1 citations
IMEC1
TL;DR: This chapter introduces an analog fractional-N subsampling PLL that relies on a digital-to-time (DTC) converter in the phase-error comparison path for fractional residue compensation.
Abstract: This chapter introduces an analog fractional-N subsampling PLL that relies on a digital-to-time (DTC) converter in the phase-error comparison path for fractional residue compensation. Since the DTC is put at the input of the system, its resolution, linearity, and phase noise performance introduce the bottleneck for the overall spectral purity. A high-efficiency, low-noise 10-bit DTC with 0.5 ps resolution is designed. Analog sensitivities of the circuit (such as DTC gain variation) are compensated in the digital domain. The prototype achieves a robust fractional lock across the range from 9.2 GHz to 12.7 GHz with less than 280-fs rms integrated jitter (in presence of the worst fractional spur). The total power consumption of the PLL is 13 mW.
1 citations
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations