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Understanding Delta-Sigma Data Converters

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TLDR
This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract
Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Journal ArticleDOI

A novel two-channel time-interleaved second-order ΣΔ modulator

TL;DR: A new type of noise transfer function which is a band-pass filter is adopted for the modulator to reduce the folded noise and show that this two-channel TI second-order ΣΔ modulator is insensitive to channel mismatches.
Journal ArticleDOI

Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active---passive loop-filters

TL;DR: In this paper, the authors investigated the feasibility of applying the ELD compensation techniques that were used to be implemented in the active integrator's case to the hybrid Active-Passive (AP) CT ΔΣ modulator; however, some of them cannot be practically applied since the passive loop filter cannot perform proportional feedback signal summation.
Journal ArticleDOI

An 85-MHz-BW ASAR-Assisted CT 4-0 MASH $\Delta\Sigma$ Modulator With Background Half-Range Dithering-Based DAC Calibration in 28-nm CMOS

TL;DR: An on-chip background half-range dithering-based calibration technique is proposed to improve the multi-bit feedback digital-to-analog converter matching, with limited overhead cost in terms of power consumption and area.
Proceedings ArticleDOI

A digital power amplifier with FIR-embedded 1-Bit high-order ΔΣ modulation for WBAN polar transmitters

TL;DR: The proposed DPA utilizes a 1-bit second-order ΔΣ modulator to avoid nonlinearity problem of the multi-level quantization and achieve better quantization noise performance than the first-order modulator.
Proceedings ArticleDOI

Algorithm and implementation of digital calibration of fast converging Radix-3 SAR ADC

TL;DR: A calibration technique for radix-3 successive approximation register (SAR) analog-to-digital converter (ADC) that was proposed in [1] is presented and calibration technique is simulated in 180nm CMOS technology.
References
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Journal ArticleDOI

A higher order topology for interpolative modulators for oversampling A/D converters

TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Journal ArticleDOI

Decimation for Sigma Delta Modulation

TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Journal ArticleDOI

An analysis of nonlinear behavior in delta - sigma modulators

TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Book ChapterDOI

The Structure of Quantization Noise from Sigma-Delta Modulation

TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Journal ArticleDOI

A fourth-order bandpass sigma-delta modulator

TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.