Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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10 May 2015
TL;DR: In this article, a two-path resonator structure is proposed to overcome circuit non-idealities effects on resonator performance, which leads to more relaxed circuit requirements and low power consumption.
Abstract: This paper presents a new two-path resonator structure which is tunable in resonance frequency. Being able to tune NTF zeros, makes it possible to overcome circuit non-idealities effects on resonator performance. In addition, tunable band pass Delta Sigma Modulator (ΔΣM) can be used in multiband receivers. Using two-path structure leads to more relaxed circuit requirements and low power consumption. Second order ΔΣM using proposed tunable resonator is simulated in both system and circuit level to verify performance. Resonance frequency can be tuned from DC to half of the sampling frequency. Circuit level realization of proposed structure is designed and simulated in 180nm CMOS.
1 citations
20 Dec 2014
TL;DR: In this paper, a modelo computacional de un modulador ∑-∆ of 2 ° orden for the generation of las senales Pulse Density Modulated (PDM) (modulado por densidad de pulso) requerido en el diseno propuesto by uno de los autores in un trabajo anterior that trata sobre la verificacion del funcionamiento de circuitos integrados analogicos.
Abstract: En este articulo se realiza la modelo computacional de un modulador ∑-∆ de 2 ° orden para la generacion de las senales Pulse Density Modulated (PDM) (modulado por densidad de pulso) requerido en el diseno propuesto por uno de los autores en un trabajo anterior que trata sobre la verificacion del funcionamiento de circuitos integrados analogicos. Para este proposito, se estudia el funcionamiento teorico de los moduladores ∑-∆ , y se realiza el modelo matematico de este ultimo usando las ecuaciones en diferencias finitas en el marco del muestreo coherente. Luego de esto, se codifica en Matlab ™ el modelo matematico y se verifica que tal modelo se comporta conforma a la teoria de la modulacion ∑-∆ mediante simulaciones. Debido a que este trabajo es complementario a uno desarrollado con anterioridad, como ya se menciono se debe verificar que los estimulos que estan codificados en las senales PDM sean recuperables mediante un filtro pasa-bajas, por tanto, se implemento el filtro en Matlab ™ y se le aplico a las senales PDM . El resultado fue la correcta recuperacion de los estimulos pero con un ruido remanente (fuera y dentro de la banda de interes) no eliminable mediante filtrado que se puede considerar una desventaja, pero que es tolerable.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Éste espectro se visualizará con la frecuencia normalizada f/fs, como se hace en [3] y en [12] en lugar de una escala logarítmica de la frecuencia f, debido a la no existencia de armónicos adicionales al tono de interés....
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01 Oct 2016
TL;DR: A new type of wireless neural recording front-end with PWM modulation that can achieve low-power and low-voltage operation in scaled technology and the inherent anti-aliasing filter and first-order noise shaping are exploited to reject supply ripples and enhance resolution.
Abstract: A new type of wireless neural recording front-end with PWM modulation is proposed. The target signal is first encoded into binary levels with varying pulse width by PWM modulation, which intrinsically has much higher dynamic range compared with conventional voltage-mode instrumentation amplifiers. The front-end is thus not saturated by stimulation artifacts, enabling simultaneous recording and stimulation. A set of counters triggered by a system clock along with the PWM front-end output form a 1st order continuous-time delta-sigma modulator for signal digitization, which can be considered as a modified VCO-based ADC. The inherent sinc anti-aliasing filter and first-order noise shaping are exploited to reject supply ripples and enhance resolution. The proposed architecture is digitally intensive, hence can achieve low-power and low-voltage operation in scaled technology. The theoretical analysis and simulation based on behavior models are presented in this paper.
1 citations
Additional excerpts
...with a full-scaled sinusoidal input [6]....
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TL;DR: The analysis shows that limited bandwidth of the low-pass envelope reconstruction filter in the ΔΣ supply modulator can affect the transmitting signals’ fidelity of the polar transmitter, which can be measured by the system specifications of error vector magnitude and adjacent channel power ratio.
Abstract: In this paper, the spectral regrowth issues of the separated broadband signals’ magnitude and phase components have been analyzed using stochastic theory for polar transmitters. The analysis shows that limited bandwidth of the low-pass envelope reconstruction filter in the ΔΣ supply modulator can affect the transmitting signals’ fidelity of the polar transmitter, which can be measured by the system specifications of error vector magnitude (EVM) and adjacent channel power ratio (ACPR). The relations between the cut-off frequency of the filter and the specifications of EVM and ACPR have been derived to determine the minimum required filter bandwidth. The relations are verified by simulation examples of wideband WCDMA and WLAN 802.11a signals. In the time-domain, the limited bandwidth of the low-pass filter is verified to be responsible for the quasi-memory effects observed in the input envelope amplitude to output envelope amplitude (AM–AM) relation of the ΔΣ supply modulator. Through numerical examples, the effects of inaccurate pulsewidth caused by non-zero transistor’s rise and fall time have been found to be one of the factors causing nonlinear AM–AM relation of supply modulators. The ΔΣ envelope modulator restrained by limited envelope bandwidth and inaccurate pulsewidth can be characterized as a nonlinear system with memory, which is modeled by ARMAX Hammerstein systems in this paper. The validity of this model is verified by a simulation example of a WCDMA supply modulator.
1 citations
01 Oct 2017
TL;DR: In this paper, the authors proposed a new signal-conditioning scheme based on discrete wavelet transform (DWT) and compared it to some established filtering techniques to assess which is most suitable for the application.
Abstract: Thermal stress is one of many possible failure causes of power electronics systems; thermal cycles are known to produce mechanical fatigue on power electronic devices, thus leading to their failure in time. Temperature swing can be somehow controlled, if some decrease in efficiency can be tolerated by the power system, changing gate driver parameters to heat up the device in low load conditions. This is known as Active Thermal Control (ATC). To implement ATC, the temperature information of devices is needed. Since this sensing is carried out near power conductors, switched at high frequency, strong disturbances will affect the reading. This paper proposes a new signal-conditioning scheme based on discrete wavelet transform (DWT) and compares it to some established filtering techniques to assess which is most suitable for the application. Hints about insulation of measuring equipment will be given, too. Moreover, the possibility offered by the algorithms to store long-time temperature information (through compression of incoming data) will be described, as large-span observation can help prognostic algorithms in forecasting the remaining useful life of the power apparatus.
1 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...Input data was generated with the desired shape, then the model of an ideal ΣΔ ADC modulator was used to gather the PDM stream [11]....
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...Actually, with ΣΔ modulators the best signal-to-noise ratio (SNR) is achievable when the order of the sinc filter is higher than the order of the modulator [11]....
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...smaller decimation filter and very frequently the first one is a sinc decimator [11]....
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References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations