Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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29 Dec 2011
TL;DR: Using an auxiliary quantizer before unity-STF SDM, a novel 3rd-order dual-quantizer SDM with extended dynamic range is presented in this paper, where hybrid distributed feedback & feedforward paths and an internal feedforward path are used.
Abstract: Using an auxiliary quantizer before unity-STF SDM, a novel 3rd-order dual-quantizer SDM with extended dynamic range is presented. With hybrid distributed feedback & feedforward paths and an internal feedforward path, a novel low-distortion 3rd-order SDM with simple adder before quantizer is proposed as the unity-STF SDM. Simulations show their perfect immunity to non-idealities.
1 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...To simplify power-hungry active or parasitics-sensitive passive adder before quantizer of CIFF SDMs [3], Fig....
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...The final scaled values with rational approximations are shown in Table I where f which has no impact on unity-STF is set by enumerative method and the rest are extracted by Toolbox [3]....
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01 Nov 2014
TL;DR: In this paper, an improved delta-sigma modulation scheme was proposed to suppress switching noise component in dc-dc converters, and it was proved that the proposed converter is suitable for suppressing switching noise components.
Abstract: This paper proposes an advanced modulating dc-dc converter introducing improved delta-sigma modulation scheme. The proposed converter is compared to an original type delta-sigma modulated converter, and it is proved that the proposed converter is suitable for suppressing switching noise component.
1 citations
Dissertation•
01 Mar 2016
TL;DR: Reference clock design for low power and low phase noise with temperature compensation as mentioned in this paper, which is a reference clock design that uses temperature compensation for low-power and low-phase noise.
Abstract: Reference clock design for low power and low phase noise with temperature compensation
1 citations
01 Jan 2011
1 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...Hence, conventional CIFF loop architecture is adopted with local feedback around 3 rd and 4 th integrator to create in-band zero for optimum noise shaping characteristic [45]....
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01 Dec 2010
TL;DR: This paper simulates a digital modulator design embodying the hybrid modulation scheme and the pulse randomizer, and compares its performance with that of a similar design employing a 3-state ΔΣM scheme alone.
Abstract: In this paper, we adopt a hybrid modulation scheme for digital modulators of Class D amplifiers of power-critical digital hearing aids. The hybrid modulation scheme comprises the Delta-Sigma modulation (ΔΣM) scheme and the Pulse Width Modulation (PWM) scheme. The ΔΣM of the hybrid modulation scheme quantizes down the input data while the PWM generates 3-state output pulses corresponding to the quantized data. For this hybrid modulation scheme, we propose to quantize down the input to an output with 5 quantization levels. By using this amount of quantization levels, it is possible to obtain higher output linearity than that obtained by using the ΔΣM alone (same 3-state, but only 3 quantization levels). It is also possible to generate the output pulses without using a higher clock frequency than the input sampling frequency - unlike the usual PWM pulse generation that typically requires higher clock frequency. We also propose a simple pulse randomizer to improve the output linearity. We simulate a digital modulator design embodying the hybrid modulation scheme and the pulse randomizer, and compare its performance with that of a similar design employing a 3-state ΔΣM scheme alone. The THD+N of the output from the hybrid scheme modulator is −85 dB and is 10 dB better than that of the ΔΣM modulator.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...The ΔΣM part of the digital modulator employs a 2 nd -order error-feedback structure [8] that is chosen because of its low computational complexity....
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References
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TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations