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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings ArticleDOI
Shanthi Pavan1
01 Jun 2014
TL;DR: This work exploits the linearity of the loop filter to determine the Signal and Noise Transfer Functions (NTF) of a modulator using time domain techniques that need far less simulation time than conventional methods.
Abstract: Determining the Noise and Signal Transfer Functions (NTF and STF) of a Continuous-Time Delta-Sigma Modulator (CTDSM) is an important aspect of the design verification process. In several practical CTDSM designs, like those with Switched Capacitor (SC) and Return-to-Open (RTO) feedback DACs, the loop filters are time varying, rendering traditional methods incorrect and/or time consuming. In this work, we exploit the linearity of the loop filter to determine the Signal and Noise Transfer Functions (NTF) of a modulator using time domain techniques that need far less simulation time than conventional methods.

1 citations


Cites background or methods from "Understanding Delta-Sigma Data Conv..."

  • ...The frequency response of the Lo(s) is computed using an AC analysis, and multiplied with the NTF [1]....

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  • ...Using the following notation v = [v[M ] v[M + 1] · · · v[M +N ]] h = [h[0] h[1] · · · h[L]] ucr = [ucr[M ] ucr[M + 1] · · · ucr[M +N ]] usr = [usr[M ] usr[M + 1] · · · usr[M +N ]]...

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  • ...The “quantizer input” port of the loop filter is excited by an impulse, a transient analysis is run and the output samples are collected [1]....

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Proceedings ArticleDOI
01 Feb 2016
TL;DR: An overview on the key features of the several building blocks constituting modern nomadic systems, and recently published examples of low power low voltage analog circuits, such as operational amplifiers, reference generators, and data converters are given.
Abstract: This paper gives an overview on the key features of the several building blocks constituting modern nomadic systems. Different micro-power energy harvesting techniques are described and discussed. In addition, this paper reviews the state of the art and provides recently published examples of low power low voltage analog circuits, such as operational amplifiers, reference generators, and data converters.

1 citations

Proceedings ArticleDOI
01 Sep 2016
TL;DR: This paper presents a low power ΣΔ CMOS modulator with op-amps operating in subthreshold region for processing bio-signals and demonstrates results to be SNDR of 79 dB, DR of 78dB, and ENOB of 12.9 bits.
Abstract: This paper presents a low power ΣΔ CMOS modulator with op-amps operating in subthreshold region for processing bio-signals. In order to reduce a power consumption of the proposed fourth order ΣΔ CMOS modulator, two opamps for implementation of integrators are designed to be operating in subthreshold region. For furthermore power reduction, the first two integrators are re-utilized with switches and capacitors to act as the second two integrators. The proposed circuit was fabricated in a 0.18um CMOS n-well 1 poly 6 metal process with the active chip core area of 900µm × 600µm and the power consumption of 360µW. Measurement results were demonstrated to be SNDR of 79 dB, DR of 78dB, and ENOB of 12.9 bits at the input frequency of 1kHz and the clock frequency of 256kHz.

1 citations


Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...In this paper, a simple feedback architecture with a single bit quantizer [8-9] is employed to minimize not only a complexity of circuit, but degeneration of circuit performances and thermal noise due to the additional and complex feedback circuit....

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Proceedings ArticleDOI
01 Nov 2013
TL;DR: A new concept of enhancing the resolution of the first order modulator by implementing a 1-bit adaptive DAC as the quantizer, which divides the total dynamic range of the modulator into several layers of smaller dynamic range.
Abstract: Delta sigma modulators perform high resolution data conversion using oversampling and noise shaping technique. Three factors must be taken into account for designing the modulator, namely the oversampling ratio, the order of the modulator, and the number of bit of the quantizer used. By configuring these factors, the resolution of the modulator can be determined. This paper introduces briefly a new concept of enhancing the resolution of the first order modulator by implementing a 1-bit adaptive DAC as the quantizer. This method simply divides the total dynamic range of the modulator into several layers of smaller dynamic range. By making 2n layers, an additional of n bit resolution can be achieved.

1 citations


Cites background or methods from "Understanding Delta-Sigma Data Conv..."

  • ...Basically the resolution of the modulator can be configured by configuring three different factors, which are: the oversampling rate ratio (OSR), the order of the modulator, and the number of bit of the quantizer used [1-3]....

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  • ...They use oversampling and noise shaping technique to shift the quantization noise into a higher frequency and to avoid aliasing [1-2]....

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Journal ArticleDOI
TL;DR: A new technique is proposed for multiplication of two sampled low frequency analog signals and the result is in digital form, which is better than the conventional CMOS multipliers.
Abstract: In this paper, a new technique is proposed for multiplication of two sampled low frequency analog signals and the result is in digital form. Out of the two signals, one signal is fed to the input of typical second order, ΔΣ Modulator (DSM). The operating period of the DSM circuit is varied directly in proportion to the absolute amplitude of the second analog signal. In this case, the average value of the digital output of quantizer is equal to the product of the analog signals in each sampling period. The dynamic range of input signals and the accuracy of proposed multiplier are better than the conventional CMOS multipliers.

1 citations


Additional excerpts

  • ...The second order, single stage, discrete, single bit quantizer and unity feedback gain ΔΣ Modulator (DSM) [1] is shown in Fig....

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References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations