Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
TL;DR: It will be shown that the generalized DWA in the complex domain has several advantages such as reduced complexity, reduced spurious behavior, and inherent quadrature error suppression.
Abstract: This brief focuses on quadrature multibit digital-to-analog conversion with data weighted averaging (DWA) as a linearization method. Previous study on generalized DWA is expanded here, into the complex domain, and is compared with prior art on complex DWA. It will be shown that the generalized DWA in the complex domain has several advantages such as reduced complexity, reduced spurious behavior, and inherent quadrature error suppression.
1 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...• The loop filter is a quadrature filter optimized for 3-bit wordsize by using Schreier’s DStoolbox [2]....
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...This is done by allocating the DS noise transfer function zeros in the image frequency band [2], [5]....
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...wordsize by using Schreier’s DStoolbox [2]....
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...In addition, as the total alias-free bandwidth is doubled, the oversampling ratio (OSR) is doubled [1], [2]....
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...For the quadrature DS loop filter, the path mismatch contributes to quantizer noise quadrature error, which can be reduced by adding NTF zeros at the image band [2], [5]....
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03 Jun 2013
TL;DR: This paper presents a new concept of sigma-delta modulator (SDM) for biomedical applications that combines switched-capacitor and switched-opamp techniques and an approach, replacing SC modulator with SOP modulator and reducing power consumption of the second-stage modulator is utilized.
Abstract: This paper presents a new concept of sigma-delta modulator (SDM) for biomedical applications. It combines switched-capacitor (SC) and switched-opamp (SOP) techniques. To Avoid signal distortion and nonlinear resistance in implementing the CMOS resistor of the SDM, an approach, replacing SC modulator with SOP modulator and reducing power consumption of the second-stage modulator, is utilized.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Sigma-delta ADC, a typical oversampling ADC with intrinsic mechanism of noise shaping, is the most popular one enhancing data resolution and reducing power consumption [2]....
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...1(b) and (c), respectively, where in-band signal is stable in our design [2]....
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01 Aug 2006
TL;DR: In this paper, the authors presented a proper method for reducing the power consumption of a SINC filter with different stage orders, which can reduce power consumption while simultaneously keeping the performance as high as that in the conventional case.
Abstract: Most high precision sigma delta DACs use SINC filters to provide large stop-band attenuation. They have the highest operating frequency in comparison to other stages and therefore consume most of the power in an interpolation filter. This paper presents a proper method for reducing the power consumption of a SINC filter. Multistage SINC filters with different stage orders can reduce the power consumption while simultaneously keeping the performance as high as that in the conventional case. A high precision sigma delta DAC is considered to verify the proposed method. Different compositions are examined to find the optimum structure, consisting of half-band, FIR droopcorrection, and SINC filters to increase the sampling rate by 128. The minimum stop-band attenuation of the implemented filters is more than 110 dB and the pass-band ripple is less than 0.0002 dB. The worst-case power and active area of these filters are calculated by implementing them using library of standard cells of a 0.18?m CMOS process.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Oversampling is done by a module called interpolation filter and a sigma-delta modulator shapes the noise into out of band frequencies [1]....
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...Using multistage filter leads to simpler stages and reduces the overall power consumption of the filter [1]....
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22 Dec 2009
TL;DR: In this paper, a robust PWM class D amplifier with high linearity and good immunity to process variations is described. And the adaptive triangular wave generator (ATG) is used to achieve 0.0042% THD+N and 99.2dB dynamic range.
Abstract: This paper describes a robust PWM class D amplifier with high linearity and good immunity to process variations. By using the proposed adaptive triangular wave generator (ATG), 0.0042% THD+N and 99.2dB dynamic range is achieved in this design. The standard deviation of THD+N ratio over 22 samples can be smaller by 4 times compared to the results without the adaptive triangular wave generator. This chip integrates power MOS stages and 2 channel design. The supply voltage is from 3V to 5.5V and the die area is 2.45mm × 2.9mm.
1 citations
Cites methods from "Understanding Delta-Sigma Data Conv..."
...Since the distortion-shaping performance is based on how the sigma delta loop behaves, the design procedure used in sigma delta modulators [3] should be introduced to make sure that the loop is stable and the shaping is sufficient to meet the specification requirement....
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Dissertation•
01 Jan 2018
TL;DR: The design achieves a very stable operation across all the variations introduced in the converter, having a maximum offset error of 0.5 LSB, and is able to achieve an absolute accuracy of 16.93 bits for the typical corner.
Abstract: In this thesis an ultra-low power, high precision incremental delta-sigma analog to digital converter is presented. The converter is designed for being implemented as a part of a zoom hybrid analog to digital converter architecture with 16-bit resolution and 900mV power supply. The converter has an input voltage range from 0V to 900mV, and a signal bandwidth of 50Hz, virtually DC signals. The second-order incremental ∆Σ converter has a cascade of integrators with feed forward structure, realized with switched capacitor integrators and one bit quantizer. The noise requirements have been determined with MATLAB simulations and analog noise hand calculations, leading to the definition of the incremental converter coefficients. Then, the minimum requirements for the components have been determined with behavioural models. Simulations show the necessity of a technique to avoid amplifier’s input offset voltage to cause error in the conversion. Thus, chopper stabilization has been implemented to attenuate offset and low-frequency noise. The performance of the converter has been checked with extensive simulations across process, temperature and voltage variations. The converter is able to achieve an absolute accuracy of 16.93 bits for the typical corner, consuming only 445nW. Furthermore, the design achieves a very stable operation across all the variations introduced in the converter, having a maximum offset error of 0.5 LSB.
1 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...This calculation of the loop coefficients is done with the ∆Σ MATLAB Toolbox that has been presented in [22]....
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...The main reason for the change is the correlation of the noise models extracted from [22],...
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...The author in [22], recommends the solution of minimizing x....
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References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations