Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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Proceedings Article•
11 Dec 2011TL;DR: The paper deals with the synchronization of two chaotic Sigma-Delta Modulators, a system that could be used for chaotic encryption and genetic algorithms with which all the states of the original system can be reconstructed with only partial information.
Abstract: The paper deals with the synchronization of two chaotic Sigma-Delta Modulators. The synchronization is reached via two modulators: one of the modulators is used to code the input information into a bitstream, while the second demodulator is used to decode the obtained bitstream into the original state of the applied input signal. In this way, the system could also be used for chaotic encryption; current work utilize genetic algorithms with which all the states of the original system can be reconstructed with only partial information.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...If an input signal within this frequency band is applied to the loop, the most of the noise imposed by the quantization process will lie outside of the frequency band of interest and can subsequently be filtered out, leaving a good approximation to the input signal [1], [2], [3], [4], [5]....
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...These are aperiodic orbits which exist for zero input and which, if they lie at low enough frequencies, can appear as unwanted audible tones in the output of the modulator [1]....
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...Whether implemented it with usage of successive approximation registers, pipelined converters, or other techniques, high resolution is difficult to be obtained in PCM conversion due to the need to accurately represent many quantization levels combined with the subsequent circuit complexity [1], [2], [3], [4], [5]....
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20 Mar 2014
TL;DR: The design of a 12 bit dynamic element matching (DEM) DACs which eliminates pulse shape, timing, and amplitude errors arising from component mismatches as sources of non-linear distortion in high resolution DACs is shown.
Abstract: This paper shows the design of a 12 bit dynamic element matching (DEM) DACs which eliminates pulse shape, timing, and amplitude errors arising from component mismatches as sources of non-linear distortion in high resolution DACs. This has been proved through analytical and simulation results in 0.18 μm standard CMOS process. A set of sufficient conditions of the DEM encoder that ensure this effect, and a specific segmented DEM encoder that satisfies the sufficient conditions are presented here. Unlike the most previously published fully randomized DEM encoders, the complexity of this design does not grow exponentially with the number of bits of DAC resolution. Part of this DEM DAC may be included in noise cancellation circuit in ΣΔ fractional-N PLL. Analytical results are demonstrated with simulation results. Additionally, this paper provides the explanation of noise cancellation in ΣΔ fractional-N PLL and power dissipation versus circuit complexity trade off.
1 citations
Cites background from "Understanding Delta-Sigma Data Conv..."
...Dynamic element matching (DEM) digital to analog converters (DACs) [8]-[9] have enabled major performance improvements over the oversampling delta-sigma data converters, pipelined ADCs, and high resolution Nyquist-rate DACs....
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01 May 2017
TL;DR: In this article, a matrix form representation of sigma-delta modulator structure allows to obtain it's signal and noise transfer functions, which are necessary to analyze important modulator features: potential signal to noise ratio and stability of the modulator.
Abstract: Matrix form representation of sigma-delta modulator structure allows to easily obtain it's signal and noise transfer functions. Those functions are necessary to analyze important modulator features: potential signal to noise ratio and stability of the modulator. An example of 5th order modulator is presented.
1 citations
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...Modulator coefficients calculated in [1] have the following values: b = 0....
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...Sigma-delta modulators of high order are built with rather complicated structures using multiple feedback and feedforward connections [1-3]....
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...This makes it impossible to use zeros optimization procedure [1] to minimize quantization noise power in the frequency band of interest....
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...Some additional feedback connections can modify the noise transfer function so to make possible zeros adjustment [1,2]....
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...Due to intensive research in sigma-delta modulators a number of modulator structures are proposed for base band and band pass modulators [1-3]....
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01 Oct 2016
TL;DR: A 4 MHz monolithic digital single-inductor dual-output (DSIDO) buck/boost converter based on 10-bit ΣΔ modulator and 4-bit delay line digital pulse width modulator is presented.
Abstract: A 4 MHz monolithic digital single-inductor dual-output (DSIDO) buck/boost converter based on 10-bit ΣΔ modulator and 4-bit delay line digital pulse width modulator (DPWM) is presented. Window delay line ADCs, digital PID compensator and DPWM with 2nd ΣΔ modulator are utilized in the converter to pursue highly flexible and intelligent power management. Digital Extend PWM control method is proposed to the converter which is implemented in 0.35µm CMOS process. Measurement results show the converter can work in buck mode, boost mode and buck/boost mode. The converter has a peak efficiency of 83% while offers 400mA current to the load. And the outputs voltage ripples are less than 47mV both in buck and boost mode.
1 citations
02 Jun 2012
TL;DR: In this article, a power source is rectified to DC and then converted to AC to stabilize output voltage, but this method raises large switching noise peaks at multiple numbers of carrier frequency, and this is undesirable.
Abstract: As progressing information technology, continuous running systems are as usual. For these systems, power supplies are also running continuously. One type power converter constitution is that AC power source is rectified to DC and then converted to AC to stabilize output voltage. To generate AC voltage, pulse width modulation (PWM) scheme is generally used. But this method raises large switching noise peaks at the multiple numbers of carrier frequency, and this is undesirable.
1 citations
References
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TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations