Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
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Proceedings Article•
01 Nov 2010TL;DR: This paper presents a high-level synthesis MATLAB toolbox for reconfigurable delta-sigma analog-to-digital converters used in multi-standard wireless communication terminals and verification, the toolbox is used to verify some of the reconfigured analog to digital converter chips proposed and made for multi- standard wireless applications.
Abstract: This paper presents a high-level synthesis MATLAB toolbox for reconfigurable delta-sigma analog-to-digital converters used in multi-standard wireless communication terminals. The main algorithm synthesizing the reconfigurable delta-sigma modulators finds an optimal discrete time architecture which can be reconfigured for different considered communication standards and predicts the parameters of the modulator to achieve the required resolution for different operation modes. Estimating the requirements of analog blocks, combined with power consumption evaluation and extracting an area factor for different delta-sigma modulator architectures makes the proposed toolbox an advantageous alternative for reconfigurable delta-sigma modulator synthesis. As verification, the toolbox is used to verify some of the reconfigurable analog to digital converter (ADC) chips proposed and made for multi-standard wireless applications.
Cites methods from "Understanding Delta-Sigma Data Conv..."
...e L=2, b=1 and OSR=2 using Delta-Sigma toolbox (delsig) introduced in [8]....
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01 Oct 2019
TL;DR: This paper presents a continuous-time $\Delta\Sigma$ ADC in a 28nm-FDSOI CMOS technology, with a 4th order loop filter adopted to enhance quantization noise shaping in presence of a low OSR.
Abstract: This paper presents a continuous-time $\Delta\Sigma$ ADC in a 28nm-FDSOI CMOS technology. The ADC is clocked at 5GHz with a signal bandwidth of 250 MHz, for an oversampling ratio (OSR) of only 10. The conversion from high-level model to circuit-level implementation requires multiple high-speed design methodologies and a careful layout. A 4th order loop filter is adopted to enhance quantization noise shaping in presence of a low OSR. The loop filter is built with inverter-based integrators, and the transistors are tuned by adjusting body-biasing voltages. The extra loop delay exceeds one clock cycle, requiring two additional feedback paths to restore the nominal noise transfer function. Furthermore, current-mode logic is used in the digital part to improve the signal transition speed. The $\Delta\Sigma$ ADC has a simulated SNDR of 73.1 dB for a simulated power consumption of 232mW.
Cites background or methods from "Understanding Delta-Sigma Data Conv..."
...The signal swing at the integrator outputs is reduced due to the absence of feedback to the internal nodes [4]....
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...Firstly, the DSM is synthesized in DT using the Delta-Sigma tool box from [4]....
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Journal Article•
02 Jan 2015-World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering
TL;DR: In this paper, the second order ΔΣ modulator (DSM) is modified with input signal dependent forward path gain, which is suitable for industrial applications where one needs the digital representation of the analog input signal, during each sampling period.
Abstract: Higher order ΔΣ Modulator (DSM) is basically an unstable system. The approximate conditions for stability cannot be used for the design of a DSM for industrial applications where risk is involved. The existing second order, single stage, single bit, unity feedback gain , discrete DSM cannot be used for the normalized full range (-1 to +1) of an input signal since the DSM becomes unstable when the input signal is above ±0.55. The stability is also not guaranteed for input signals of amplitude less than ±0.55. In the present paper, the above mentioned second order DSM is modified with input signal dependent forward path gain. The proposed DSM is suitable for industrial applications where one needs the digital representation of the analog input signal, during each sampling period. The proposed DSM can operate almost for the full range of input signals (-0.95 to +0.95) without causing instability, assuming that the second integrator output should not exceed the circuit supply voltage, ±15 Volts. Keywords—DSM, stability, SNR, state variables.
Cites background from "Understanding Delta-Sigma Data Conv..."
...The loop stability is obtained by feed forward coefficients and feedback coefficients are added to optimize quantization noise response in base band [1], [3]....
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...For a typical DSM with unity or greater than unity feedback gain, y(k) is equal to xnor(k) during the k update period [1]-[3]....
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19 Dec 2013
TL;DR: This paper introduces an error model that can estimate the error caused by implementing the sensor in the modulator and achieves up to 99.9% accuracy.
Abstract: A sensor is an analogue element that mostly has nonlinearity characteristics. Integrating the sensor as the delta element in a delta sigma modulator system enables to interface the sensor in a small and compact system. Due to the nonlinearity of the sensor, a new problem is being introduced to the delta sigma modulator system. To minimize this particular problem, the system is normally designed by limiting the feedback signal which means also limiting the dynamic range of the system. This paper introduces an error model that can estimate the error caused by implementing the sensor in the modulator. The model achieves up to 99.9% accuracy.
TL;DR: The approach, that presupposes linear behavior of active blocks, produces a CT modulator with the same noise shaping as its Discrete-Time counterpart, and can be effectively implemented with circuit simulators to allow the exact design with transistor level blocks.
Abstract: A technique for the exact design of the noise transfer function of Continuous-Time (CT) Sigma-Delta modulators with arbitrary and multiple DAC responses and real op-amps is here presented. The approach, that presupposes linear behavior of active blocks, produces a CT modulator with the same noise shaping as its Discrete-Time counterpart. The method operates entirely in the time domain and accounts for non-idealities of real implementations such as finite gain and bandwidth of integrators. The procedure can be effectively implemented with circuit simulators to allow the exact design with transistor level blocks. A design example on a third-order scheme confirms the effectiveness of the method.
References
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TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations