Book•
Understanding Delta-Sigma Data Converters
08 Nov 2004-
TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.
Citations
More filters
01 Jan 2018
TL;DR: The analog signal and the digital signal, which are widely used in electronic circuits and systems, are four kinds of signals.
Abstract: Considering that a signal can be continuous or discrete in time and amplitude, there are four kinds of signals. Among these, the analog signal (continuous in time and amplitude) and the digital signal (discrete in time and amplitude ) are widely used in electronic circuits and systems.
01 Aug 2017
TL;DR: Two Band-Pass (BP) Discrete Time (DT) ΔΣ modulators are proposed in this paper, and the drawback of high-speed power-hungry adder is tackled by proposing a modified unity signal transfer function (STF) adder-less feedforward structure.
Abstract: Two Band-Pass (BP) Discrete Time (DT) ΔΣ modulators are proposed in this paper In both cases, the drawback of high-speed power-hungry adder is tackled by proposing a modified unity signal transfer function (STF) adder-less feedforward structure The first proposed BP DT ΔΣ modulator is a conventional adder-less multi-stage noise shaping (MASH) ΔΣ modulator, while the noise leakage problem, caused by the mismatches between analog loop filter and digital cancellation logic (DCL), is mitigated by proposing a second topology in which the DCL is omitted All of these features make the proposed modulators suitable for low-voltage and low-power applications, while the second proposed topology features a higher robustness against noise leakage and mismatch Time-domain behavioral simulations show a 0-dBFS overload input level for the proposed architectures while the DC-gain is relaxed for the second proposed architecture such that a 67-dB S NDR can be obtained with only a 30-dB amplifier DC-gain at a −20-dBFS input signal level
Cites background from "Understanding Delta-Sigma Data Conv..."
...This is due to the fact that the resonators in the conventional BP DT ΔΣM process both input signal and quantization error [3]....
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...Second, the number of feedback Digital-to-Analog Converters (DACs) in a FF topology is less than its FB counterpart [3]....
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15 Feb 2013
Cites methods from "Understanding Delta-Sigma Data Conv..."
...The hand calculation method is to implement the following algorithm [4], [7], and [8]: 1) To meet the resolution specification, choose the variables for system-level design such as oversampling ratio (OSR), number of levels in the internal quantizer (N), order of the loop filter (L) based on the following equations [8] :...
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Patent•
03 Nov 2020TL;DR: In this paper, a calibration operation adjusts a frequency of a ring oscillator to a desired frequency by adjusting programmable RC circuits in the stages of the ring-oscillator.
Abstract: A calibration operation adjusts a frequency of a ring oscillator to a desired frequency by adjusting programmable RC circuits in the stages of the ring oscillator. The programmable RC circuits have programmable capacitors, resistors, or both. The RC circuits account for most of the delay through the ring oscillator. Another circuit with its own RC time constant is calibrated based on the adjustments made to the RC circuits in the ring oscillator to achieve the desired frequency.
References
More filters
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >
399 citations
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
342 citations
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.
284 citations
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
255 citations
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >
211 citations