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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings ArticleDOI
18 May 2008
TL;DR: The core of the method is an NTF prototype generation in the DT-domain based on the quasilinear quantizer modeling, that maximizes the maximum stable amplitude (MSA) of the modulator while achieving a certain minimum peak SNDR.
Abstract: In this paper, a new methodology for the automated design of one-bit internal quantizer SigmaDelta-modulators is presented. The core of the method is an NTF prototype generation in the DT-domain based on the quasilinear quantizer modeling, that maximizes the maximum stable amplitude (MSA) of the modulator while achieving a certain minimum peak SNDR. For CT-modulator's, this is followed by a DT-CT mapping of the loop filter in state-space. The improved MSA allows for higher circuit noise and thus greatly relaxes the area and power consumption constraints of the design. Simulation results at the end of the paper verify the validity of the method.
Journal ArticleDOI
12 Apr 2017
TL;DR: This investigation utilized Matlab® program to recommend a proper scheme for a wireless-call button network of input signal, normalized frequency, and over-sampling ratio against signal-to-quantization noise ratio and studied how oversampling can enhance the accomplishment of an analog- to-digital adapter.
Abstract: The received analog signal must be digitized before the digital signal processing can demodulate it. Sampling, quantization, and coding are the separate stages for the analog-to-digital adaptation procedure. The procedure of adapting an unceasing time-domain signal into a separate time-domain signal is called sampling. While, the procedure of adapting a separate-time, continuous-valued signal into a discrete-time, discrete-valued signal is known as quantization. Thus, quantization error is the mismatch between the unquantized sample and the quantized sample. The method of demonstrating the quantized samples in binary form is known as coding. This investigation utilized Matlab® program to recommend a proper scheme for a wireless-call button network of input signal, normalized frequency, and over-sampling ratio against signal-to-quantization noise ratio. Two vital characteristics of this wireless network design are cost-effective and low-power utilization. This investigation, through reducing the in-band quantization error, also studied how oversampling can enhance the accomplishment of an analog-to-digital adapter. Index Terms: Analog-to-digital Adapter, Coding, Matlab, Quantization Error, Wireless Network

Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...It can be stated that sigma-delta [3] analog-to-digital adapter is a most common approach of over-sampling analog-to-digital adapter....

    [...]

Proceedings ArticleDOI
01 Dec 2019
TL;DR: A hybrid sturdy-MASH-21 (SMash-21) delta-sigma modulator (DSM) chip design is presented and differential opamps are employed in the hybrid SMASH- 21 DSM chip to reduce even-mode harmonics.
Abstract: In this paper, we present a hybrid sturdy-MASH-21 (SMASH-21) delta-sigma modulator (DSM) chip design. We employ differential opamps in the hybrid SMASH-21 DSM chip to reduce even-mode harmonics. The proposed circuit is realized in TSMC 0.18-µm CMOS technology. It consumes 2.58 mW of power. The sampling rate is 5.9976 MHz and the over-sampling ratio is 136. The achieved SNDR of the chip is 72.48 dB. The chip occupies an area of 1.68 mm2.

Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...Then the in-band quantization noise power is approximately q(2) rms = (π Δ(2))/[12(2L + 1)OSR] [1]....

    [...]

Journal ArticleDOI
TL;DR: This paper provides a tutorial description of the physical phenomena taking place in an Sc circuit while it processes noise and proposes some specialized but highly efficient algorithms for estimating the resulting sampled noise in Sc circuits, which need only simple calculations.
Abstract: Thermal noise is one of the most important challenges in analogue intergrated circuits design. This problem is more critical in switched capacitor (Sc) filters due to the aliasing effect of wide band thermal noise. In these circuits, switching introduces a boost in the power spectral density of the thermal noise due to aliasing. Unfortunately, even though the theory of noise in Sc circuits is discussed in the literature, it is very tedious and requires highly sophisticated and not widely available software. The purpose of this paper is twofold. It provides a tutorial description of the physical phenomena taking place in anSc circuit while it processes noise. It also proposes some specialized but highly efficient algorithms for estimating the resulting sampled noise in Sc circuits, which need only simple calculations. A practical design procedure, which follows directly from the estimate, is also described. The accuracy of the proposed estimation algorithms is verified by simulation using spectre RF. As an example, it is applied to the estimation of the total thermal noise in a second order lowdistortion delta sigma converter.
Proceedings ArticleDOI
01 Dec 2006
TL;DR: This method reviews two popular methods of converting from CT to DT and applies them to a second order CT complex ADC and achieves 80dB SNDR in simulation.
Abstract: To reduce simulation times, continuous time (CT) sigma-delta modulators can be modeled as equivalent discrete time (DT) systems so that DT simulators can be used. This method reviews two popular methods of converting from CT to DT and applies them to a second order CT complex ADC. The ADC being designed is for use with a low IF receiver and achieves 80dB SNDR in simulation.

Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...Using time domain analysis, [4] shows that this can be represented by an equivalent DT system H(z) given by...

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References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations