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Understanding Delta-Sigma Data Converters

TL;DR: This chapter discusses the design and simulation of delta-sigma modulator systems, and some of the considerations for implementation considerations for [Delta][Sigma] ADCs.
Abstract: Chapter 1: Introduction.Chapter 2: The first-order delta-sigma modulator.Chapter 3: The second-order delta-sigma modulator.Chapter 4: Higher-order delta-sigma modulation.Chapter 5: Bandpass and quadrature delta-sigma modulation.Chapter 6: Implementation considerations for [Delta][Sigma] ADCs.Chapter 7: Delta-sigma DACs.Chapter 8: High-level design and simulation.Chapter 9: Example modulator systems.Appendix A: Spectral estimation.Appendix B: The delta-sigma toolbox.Appendix C: Noise in switched-capacitor delta-sigma data converters.

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Citations
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Proceedings ArticleDOI
19 Jul 2011
TL;DR: In this article, a DC-to-DC converter is proposed for the load current range of 0 to 100 mA, which uses a variable switching frequency control method to adjust the power efficiency as well as the ripple to the optimum value as per the load conditions.
Abstract: We present a DC to DC Converter to step down an unregulated DC voltage source of 2.7 – 3.6 V to a regulated 1.8 V DC with peak power efficiency of 94%. The DC to DC Converter, constituted here, is designed for the load current range of 0 to 100 mA. The converter uses a variable switching frequency control method to adjust the power efficiency as well as the ripple to the optimum value as per the load conditions. This control mechanism is implemented by a delta modulator which makes the switching frequency load dependent. The simplicity of the delta modulator causes the silicon real estate as well as the power salvage. It makes the design highly power proficient enabling it to achieve the efficiency greater than the conventional PWM based DC to DC converter. The design, proposed here, procures efficiency of approximately 90% at and above 20% of the full load, and thereby maintains the flat efficiency curve almost over the entire load range.

Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...A block diagram of a clas­ sical first order delta modulator is as shown in Figure 2[4]...

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Journal ArticleDOI
TL;DR: In this paper , the authors proposed a self-compensation technique to compensate the 6dB DR loss caused by the utilization of 1-MSB mismatch error shaping (MES) in a noise shaping (NS) successive-approximation-register ADC.
Abstract: This letter proposes a dynamic-range (DR) self-compensation technique to compensate the 6-dB DR loss caused by the utilization of 1-MSB mismatch error shaping (MES) in a noise shaping (NS) successive-approximation-register ADC. The DR self-compensation technique is realized by using an additional conversion to reduce the total input voltage in the analog domain, preventing overload effect in the conversion process. A compensation to the output binary code in the digital domain is also added to make the digital output match the analog input. The proposed DR self-compensation technique can compensate 4.8 dB of the 6-dB DR loss averagely.
Proceedings ArticleDOI
Marko Neitola1
01 Aug 2015
TL;DR: This work proposes an auxiliary tool for the well-known Schreier's Delta-Sigma toolbox based on flow-graph analysis and offers means to generate a loop filter state-space model for the given topology.
Abstract: This work proposes an auxiliary tool for the well-known Schreier's Delta-Sigma toolbox. The proposed tool is based on flow-graph analysis and offers means to generate a loop filter state-space model for the given topology. The state-space model can be used as the initial behavioral model for performance verification. The proposed approach also eases performing a loop filter coefficient mismatch sweep. The emphasis is here on complex Delta-Sigma converters. For the complex domain, novel optimization methods for quadrature-noise insensitive noise transfer function are also presented.

Cites background from "Understanding Delta-Sigma Data Conv..."

  • ...To mitigate the quadrature error from path mismatch, (at least) one of the NTF zeros must be sacrificed and placed in the image band center [2]....

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  • ...Among many other features, Delta-Sigma toolbox (available in [1] and further documented in [2]) is able to generate a state-space loop filter presentation to the most common DS topologies....

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  • ...The noise and signal transfer functions are 1/(1 − L1(z)) and L0(z)/(1 − L1(z)), respectively [2]....

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  • ...In Delta-Sigma A/D conversion, an NTF zero placed at the image band cancels the quadrature noise component due to loop filter coefficient mismatch [2]....

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  • ...• stimuli: iu = [8, 9] • delay inputs: ixi = [1, 2, 3] • delay outputs: ix = [5, 6, 7] • loop filter output: iy = 4...

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01 Dec 2009
TL;DR: A system design with new empirical stability criteria for sigma-delta modulators is proposed, and several stability criteria of different targets (e.g., architectures, oversampling ratios, and multi-bit) are found.
Abstract: A system design with new empirical stability criteria for sigma-delta modulators is proposed. The stability criteria is a cubic function obtained by the least square method, and simulations including coefficients variation due to component mismatches of circuit implementation are included. By using the proposed methodology, several stability criteria of different targets (e.g., architectures, oversampling ratios (OSRs), and multi-bit) are found.

Cites methods from "Understanding Delta-Sigma Data Conv..."

  • ...Sigma-delta modulation (SDM) has become the most popular technique for high-performance analog-to-digital and digital-to-analog converters [1]–[3]....

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  • ...In the SDM designs, the most widely used approximate criterion is the Lee criterion [3]....

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References
More filters
Journal ArticleDOI
TL;DR: Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering.
Abstract: Oversampling interpolative coding has been demonstrated to be an effective technique for high-resolution analog-to-digital (A/D) conversion that is tolerant of process imperfections. A novel topology for constructing stable interpolative modulators of arbitrary order is described. Analysis of this topology shows that with proper design of the modulator coefficients, stability is not a limitation to higher order modulators. Furthermore, complete control over placement of the poles and zeros of the quantization noise response allows treatment of the modulation process as a high-pass filter for quantization noise. Higher order modulators are shown not only to greatly reduce oversampling requirements for high-resolution conversion applications, but also to randomize the quantization noise, avoiding the need for dithering. An experimental fourth-order modulator breadboard demonstrates stability and feasibility, achieving a 90-dB dynamic range over the 20-kHz audio bandwidth with a sampling rate of 2.1 MHz. A generalized simulation software package has been developed to mimic time-domain behavior for oversampling modulators. Circuit design specifications for integrated circuit implementation can be deduced from analysis of simulated data. >

399 citations

Journal ArticleDOI
James C. Candy1
TL;DR: It is shown that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio.
Abstract: Decimation is an important component of oversampled analog-to-digital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.

342 citations

Journal ArticleDOI
TL;DR: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion, followed by an additive noise source representing distortion components.
Abstract: This paper introduces a new method of analysis for deltasigma modulators based on modeling the nonlinear quantizer with a linearized gain, obtained by minimizing a mean-square-error criterion [7], followed by an additive noise source representing distortion components. In the paper, input signal amplitude dependencies of delta-sigma modulator stability and signal-to-noise ratio are analyzed. It is shown that due to the nonlinearity of the quantizer, the signal-to-noise ratio of the modulator may decrease as the input amplitude increases prior to saturation. Also, a stable third-order delta-sigma modulator may become unstable by increasing the input amplitude beyond a certain threshold. Both of these phenomena are explained by the nonlinear analysis of this paper. The analysis is carried out for both dc and sinusoidal excitations.

284 citations

Book ChapterDOI
James C. Candy1, O. Benjamin1
TL;DR: Simple algebraic expressions for this modulation noise and its spectrum in terms of the input amplitude are derived and can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.
Abstract: When the sampling rate of a sigma-delta modulator far exceeds the frequencies of the input signal, its modulation noise is highly correlated with the amplitude of the input. We derive simple algebraic expressions for this noise and its spectrum in terms of the input amplitude. The results agree with measurements taken on a breadboard circuit. This work can be useful for designing oversampled analog to digital converters that use sigma-delta modulation for the primary conversion.

255 citations

Journal ArticleDOI
01 Mar 1993
TL;DR: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter.
Abstract: The modulator of a bandpass analog/digital (A/D) converter, with 63 dB signal/noise for broadcast AM bandwidth signals centered at 455 kHz, has been implemented by modifying a commercial digital-audio sigma-delta ( Sigma Delta ) converter. It is the first reported fully monolithic implementation of bandpass noise shaping and has applications to digital radio. >

211 citations